ILX724K データシートの表示（PDF） - Sony Semiconductor
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ILX724K Datasheet PDF : 12 Pages
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ILX724K
Clock Pulse Recommended Timing
Item
Symbol Min.
φROG, φ1 pulse timing
t1
50
φROG pulse high level period
t2
800
φROG, φ1 pulse timing
t3
800
φROG pulse rise time
t4
0
φROG pulse fall time
t5
0
φ1 pulse rise time /φ2 pulse fall time
t6
0
φ1 pulse fall time /φ2 pulse rise time
t7
0
φRS pulse high level period
t8
45
φRS, φLH pulse timing
t9
45
φRS pulse rise time
t10
0
φRS pulse fall time
t11
0
Signal output delay time
t12
—
t13
—
∗1 These timing is the recommended condition under fφRS = 1MHz.
Typ. Max. Unit
100
—
ns
1000
—
ns
1000
—
ns
5
10
ns
5
10
ns
20
60
ns
20
60
ns
250∗1
—
ns
250∗1
—
ns
10
30
ns
10
30
ns
10
—
ns
10
—
ns
–7–
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