ADMC326 データシートの表示（PDF） - Analog Devices
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ADMC326 Datasheet PDF : 31 Pages
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ADMC326
TIMING PARAMETERS
Parameter
Clock Signals
Signal tCK is defined as 0.5 tCKIN. The ADMC326 uses an input clock with a
frequency equal to half the instruction rate; a 10 MHz input clock (which is
equivalent to 100 ns) yields a 50 ns processor cycle (equivalent to 20 MHz). When
tCK values are within the range of 0.5 tCKIN period, they should be substituted for
all relevant timing parameters to obtain specification value.
Example: tCKH = 0.5 tCK – 10 ns = 0.5 (50 ns) – 10 ns = 15 ns.
Timing Requirements:
tCKIN
tCKIL
tCKIH
CLKIN Period
CLKIN Width Low
CLKIN Width High
Switching Characteristics:
tCKL
tCKH
tCKOH
CLKOUT Width Low
CLKOUT Width High
CLKIN High to CLKOUT High
Control Signals
Timing Requirement:
tRSP
RESET Width Low
PWM Shutdown Signals
Timing Requirement:
tPWMTPW PWMTRIP Width Low
NOTES
1Applies after power-up sequence is complete.
Specifications subject to change without notice.
tCKIN
tCKIH
CLKIN
tCKIL
tCKOH
tCKH
CLKOUT
tCKL
Figure 1. Clock Signals
Min
100
20
20
0.5 tCK – 10
0.5 tCK – 10
0
5 tCK1
tCK
Max
150
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
–4–
REV. A
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