AP2127K-ADJ データシートの表示（PDF） - BCD Semiconductor

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AP2127K-ADJ

300mA HIGH SPEED, EXTREMELY LOW NOISE CMOS LDO REGULATOR

BCD Semiconductor 

Data Sheet

300mA HIGH SPEED, EXTREMELY LOW NOISE CMOS LDO REGULATOR

Pin Configuration

AP2127

K Package

(SOT-23-5)

VIN 1

GND 2

Shutdown 3

5 VOUT

4 NC/ADJ

Figure 2. Pin Configuration of AP2127 (Top View)

Functional Block Diagram

SHUTDOWN

Shutdown

and

Logic Control

VREF

MOS Driver

Current Limint

And

Thermal

Protection

VIN

VOUT

GND

Oct. 2009 Rev. 1.3

Figure 3. Functional Block Diagram of AP2127 for Fixed Version

BCD Semiconductor Manufacturing Limited

2

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