APA300-PQ896A データシートの表示（PDF） - Actel Corporation

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APA300-PQ896A

Automotive-Grade ProASIC Flash Family FPGAs

Actel Corporation 

Automotive-Grade ProASICPLUS Flash Family FPGAs

Operating Conditions

Table 1 • Absolute Maximum Ratings*

Parameter

Condition

Minimum

Maximum

Units

Supply Voltage Core (VDD)

–0.3

3.0

V

Supply Voltage I/O Ring (VDDP)

–0.3

4.0

V

DC Input Voltage

–0.3

VDDP + 0.3

V

PCI DC Input Voltage

–1.0

VDDP + 1.0

V

PCI DC Input Clamp Current (absolute)

VIN < –1V or VIN = VDDP + 1V

10

mA

LVPECL Input Voltage

–0.3

VDDP + 0.5

V

GND

0

0

V

Note: *Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to

absolute maximum rated conditions for extended periods may affect device reliability.

Performance Retention

Actel guarantees the performance numbers presented in the Actel Designer timing analysis software and in this

datasheet, as long as the specified device performance retention period is not exceeded. For devices operated and

stored at 110°C or less, the performance retention period is 20 years after programming. For devices operated and

stored at temperatures greater than 110°C, refer to Table 2 on page 5 to determine the performance retention period.

Actel does not guarantee performance if the performance retention period is exceeded. Evaluate the percentage of

time spent at the highest temperature, then determine the next highest temperature to which the device will be

exposed. In Table 2 on page 5, find the temperature profile that most closely matches the application.

For example, the ambient temperature of a system cycles between 100°C (25% of the time) and 50°C (75% of the

time). No forced ventilation cooling system is in use. An APA600-PQ208A FPGA operates in the system, dissipating 1W.

The package thermal resistance (junction-to-ambient) in still air is 20°C/W, indicating that the junction temperature of

the FPGA will be 120°C (25% of the time) and 70°C (75% of the time). The entry in Table 2 on page 5, which most

closely matches the application, is 25% at 125°C with 75% at 110°C. Performance retention in this example is at least

16.0 years.

Note that exceeding the stated retention period may result in a performance degradation in the FPGA below the

worst-case performance indicated in the Actel Timer. To ensure that performance does not degrade below the worst-

case values in the Actel Timer, the FPGA must be reprogrammed within the performance retention period. In addition,

note that performance retention is independent of whether or not the FPGA is operating. The retention period of a

device in storage at a given temperature will be the same as the retention period of a device operating at that

junction temperature.

4

Automotive Supplement

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