L4972A データシートの表示（PDF） - STMicroelectronics
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L4972A Datasheet PDF : 22 Pages
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L4972A
Table 3. Absolute Maximum Ratings
Symbol
V11
V11
V20
I20
VI
V4, V8
V3
I3
V2, V7, V9,
V10
I2
I7
I8
Ptot
TJ, Tstg
(*) SO-20
Parameter
Input Voltage
Input Operating Voltage
Output DC Voltage
Output Peak Voltage at t = 0.1µs f = 200kHz
Maximum Output Current
Boostrap Voltage
Boostrap Operating Voltage
Input Voltage at Pins 4, 12
Reset Output Voltage
Reset Output Sink Current
Input Voltage at Pin 2, 7, 9, 10
Reset Delay Sink Current
Error Amplifier Output Sink Current
Soft Start Sink Current
Total Power Dissipation at TPINS ≤ 90°C
at Tamb = 70°C (No copper area on PCB)
Junction and Storage Temperature
Value
55
50
-1
-5
Internally Limited
65
V11 + 15
12
50
50
7
30
1
30
5 / 3.75(*)
1.3/1 (*)
-40 to 150
Table 4. Thermal Data
Symbol
Rth j-pins
Rth j-amb
Parameter
Thermal Resistance Junction-Pins
Thermal Resistance Junction-ambient
max,
max,
PowerDIP
12
60
SO20
16
80
Unit
V
V
V
V
V
V
V
V
mA
V
mA
A
mA
W
W
°C
Unit
°C/W
°C/W
3 Circuit Operation
The L4972A is a 2A monolithic stepdown switching regulator working in continuous mode realized in the
new BCD Technology. This technology allows the integration of isolated vertical DMOS power transistors
plus mixed CMOS/Bipolar transistors.
The device can deliver 2A at an output voltage adjustable from 5.1V to 40V and contains diagnostic and
control functions that make it particularly suitable for microprocessor based systems.
3.1 BLOCK DIAGRAM
The block diagram shows the DMOS power transistors and the PWM control loop. Integrated functions
include a reference voltage trimmed to 5.1V ± 2%, soft start, undervoltage lockout, oscillator with feedfor-
ward control, pulse by pulse current limit, thermal shutdown and finally the reset and power fail circuit. The
reset and power fail circuit provides an output signal for a microprocessor indicating the status of the sys-
tem.
Device turn on is around 11V with a typical 1V hysterysis, this threshold porvides a correct voltage for the
driving stage of the DMOS gate and the hysterysis prevents instabilities.
An external bootstrap capacitor charge to 12V by an internal voltage reference is needed to provide cor-
rect gate drive to the power DMOS. The driving circuit is able to source and sink peak currents of around
0.5A to the gate of the DMOS transistor. A typical switching time of the current in the DMOS transistor is
50ns. Due to the fast commutation switching frequencies up to 200kHz are possible.
The PWM control loop consists of a sawtooth oscillator, error amplifier, comparator, latch and the output
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