AS8S512K32P-12 データシートの表示（PDF） - Austin Semiconductor

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AS8S512K32P-12

512K x 32 SRAM SRAM MEMORY ARRAY

Austin Semiconductor 

Austin Semiconductor, Inc.

SRAM

AS8S512K32

& AS8S512K32A

WRITE CYCLE NO. 1

(Chip Select Controlled)

tWC

ADDRESS

CS\11111222223111113333422222444455553333354444455555666667777788888

tAW tCW

WE\

tAS

111122223333444455556666

tWP11

DATAI/O 111222333444555666777888999000111tH222Z333111W442224111E 333444

11111222223333344444tA55555H6666677777888889999911111000002222211111333332222244444553333355566444446667755555777

tLZWE

tDS

tDH

DATA VALID

1112221111333222244433334444

WRITE CYCLE NO. 2

(Write Enable Controlled)

ADDRESS

CS\

WE\

tAS111122223333444455556666

11112222333344445555666677778888

DATA I/O

tWC

tAW

tCW

tAH

tWP21

111122223333444455556666777788889999000011111111222222223333333344444444555555665566

tDS

tDH

DATA VALID

AS8S512K32 & AS8S512K32A

Rev. 6.0 6/05

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

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