AT24C01B-TH-T(2008) データシートの表示（PDF） - Atmel Corporation

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AT24C01B-TH-T
(Rev.:2008)

Two-wire Serial EEPROM 1K (128 x 8)

Atmel Corporation 

4. Bus Timing

Figure 4-1.

SCL: Serial Clock, SDA: Serial Data I/O®

tF

tHIGH

SCL

tLOW

tLOW

SDA IN

tSU.STA

tHD.STA

tHD.DAT

tSU.DAT

tAA

tDH

SDA OUT

5. Write Cycle Timing

Figure 5-1. SCL: Serial Clock, SDA: Serial Data I/O

SCL

AT24C01B

tR

tSU.STO

tBUF

SDA

8th BIT

ACK

WORDn

STOP

CONDITION

(1)

twr

START

CONDITION

Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.

7

5156E–SEEPR–10/08

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