AT24C08A(2004) データシートの表示（PDF） - Atmel Corporation

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AT24C08A
(Rev.:2004)

Two-wire Serial EEPROM Extended Temperature

Atmel Corporation 

AT24C02A/04A/08A/16A

The AT24C08A only uses the A2 input for hardwire addressing, and a total of two 8K

devices may be addressed on a single bus system. The A0 and A1 pins are no-

connects.

The AT24C16A does not use the device address pins, which limits the number of

devices on a single bus to one. The A0, A1, and A2 pins are no-connects.

WRITE PROTECT (WP): The AT24C02A/04A/08A/16A have a WP pin that provides

hardware data protection. The WP pin allows normal read/write operations when con-

nected to ground (GND). When the WP pin is connected to VCC, the write protection

feature is enabled and operates as shown. (See Table 1.)

Table 1. Write Protect

WP Pin Status

At VCC

At GND

Part of the Array Protected

24C02A

24C04A

24C08A

Upper Half

(1K) Array

Upper Half

(2K) Array

Full (8K)

Array

Normal Read/Write Operations

24C16A

Full (16K)

Array

Memory Organization AT24C02A, 2K SERIAL EEPROM: The 2K is internally organized with 32 pages of 8

bytes each. Random word addressing requires an 8-bit data word address.

AT24C04A, 4K SERIAL EEPROM: The 4K is internally organized with 32 pages of 16

bytes each. Random word addressing requires a 9-bit data word address.

AT24C08A, 8K SERIAL EEPROM: The 8K is internally organized with 64 pages of 16

bytes each. Random word addressing requires a 10-bit data word address.

AT24C16A, 16K SERIAL EEPROM: The 16K is internally organized with 128 pages of

16 bytes each. Random word addressing requires an 11-bit data word address.

Table 2. Pin Capacitance

Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, Vcc= +2.7V

Symbol

Test Condition

Max

Units

CI/O

Input/Output Capacitance (SDA)

8

pF

CIN

Input Capacitance (A0, A1, A2, SCL)

6

pF

Note: This parameter is characterized and is not 100% tested.

Conditions

VI/O = 0V

VIN = 0V

3

5083A–SEEPR–9/04

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