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AT24C04A-10TE-2.7(2004) データシートの表示(PDF) - Atmel Corporation

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AT24C04A-10TE-2.7
(Rev.:2004)
Atmel
Atmel Corporation Atmel
AT24C04A-10TE-2.7 Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter-
nal device. Data on the SDA pin may change only during SCL low time periods (see
Figure 2). Data changes during SCL high periods will indicate a start or stop condition as
defined in Figure 2.
Figure 2. Data Validity
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition
that must precede any other command (see Figure 3).
Figure 3. Start and Stop Definition
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition.
After a read sequence, the stop command will place the EEPROM in a standby power
mode (see Figure 3).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from
the EEPROM in 8-bit words. The EEPROM sends a “0” to acknowledge that it has
received each word. This happens during the ninth clock cycle.
STANDBY MODE: The AT24C02A/04A/08A/16A features a low-power standby mode
that is enabled (a) upon power-up and (b) after the receipt of the STOP bit and the com-
pletion of any internal operations.
6 AT24C02A/04A/08A/16A
5083A–SEEPR–9/04

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