AT24C128BN-SH-T データシートの表示（PDF） - Atmel Corporation

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AT24C128BN-SH-T

Two-wire Serial EEPROM

Atmel Corporation 

6. Device Operation

CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device.

Data on the SDA pin may change only during SCL low time periods (see Figure 6-1). Data

changes during SCL high periods will indicate a start or stop condition as defined below.

Figure 6-1. Data Validity

SDA

SCL

DATA STABLE

DATA STABLE

DATA

CHANGE

START CONDITION: A high-to-low transition of SDA with SCL high is a start condition that must

precede any other command (see Figure 6-2).

Figure 6-2. Start and Stop Definition

SDA

SCL

START

STOP

STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a

read sequence, the stop command will place the EEPROM in a standby power mode (see Fig-

ure 6-2).

ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the

EEPROM in 8-bit words. The EEPROM sends a “0” during the ninth clock cycle to acknowledge

that it has received each word.

STANDBY MODE: The AT24C128B features a low-power standby mode that is enabled upon

power-up and after the receipt of the stop bit and the completion of any internal operations.

SOFTWARE RESET: After an interruption in protocol, power loss or system reset, any 2-wire

part can be protocol reset by following these steps: (a) Create a start bit condition, (b) clock 9

6 AT24C128B

5296A–SEEPR–1/08

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