AT24C32D データシートの表示（PDF） - Atmel Corporation
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AT24C32D Datasheet PDF : 24 Pages
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8. Write Operations
Byte Write: A Write operation requires two 8-bit data word addresses following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero then clock in the
first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero. The addressing
device, such as a microcontroller, must then terminate the write sequence with a Stop condition. At this time, the
EEPROM enters an internally-timed Write cycle, tWR, to the nonvolatile memory (See Figure 6-6). All inputs are
disabled during this Write cycle and the EEPROM will not respond until the Write is complete.
Figure 8-1. Byte Write
S
W
T
R
A
I
R Device
T
First
T Address
E
Word Address
Second
Word Address
S
T
O
Data
P
SDA Line
M
RA
A
A
A
S
/C
C
C
C
B
WK
K
K
K
Note: * = Don’t care bit.
Page Write: The 32K EEPROM is capable of 32-byte Page Writes.
A Page Write is initiated the same way as a Byte Write, but the microcontroller does not send a Stop condition
after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word,
the microcontroller can transmit up to 31 more data words. The EEPROM will respond with a zero after each
data word received. The microcontroller must terminate the Page Write sequence with a Stop condition.
The data word address lower five bits are internally incremented following the receipt of each data word. The
higher data word address bits are not incremented, retaining the memory page row location. When the word
address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the
same page. If more than 32 data words are transmitted to the EEPROM, the data word address will roll-over
and the previously loaded data will be altered. The address roll-over during Write is from the last byte of the
current page to the first byte of the same page.
Figure 8-2. Page Write
S
W
T
R
A
I
R Device
T
T Address E
First
Word Address
Second
Word Address
Data (n)
S
T
O
Data (n + x) P
SDA Line
M
RA
A
A
A
A
S
/C
C
C
C
C
B
WK
K
K
K
K
Note: * = Don’t care bit.
Acknowledge Polling: Once the internally-timed Write cycle has started and the EEPROM inputs are disabled,
acknowledge polling can be initiated. This involves sending a Start condition followed by the device address
word. The Read/Write bit is representative of the operation desired. Only if the internal Write cycle has
completed will the EEPROM respond with a zero, allowing the Read or Write sequence to continue.
10 AT24C32D [DATASHEET]
Atmel-8866D-SEEPROM-AT24C32D-Datasheet_122016
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