AT24C64D データシートの表示（PDF） - Atmel Corporation

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AT24C64D

2-Wire Serial Electrically Erasable and Programmable Read-only Memory

Atmel Corporation 

Atmel AT24C32D/64D

Figure 4-2. Bus Timing

SCL: Serial Clock, SDA: Serial Data I/O

SCL

tF

tLOW

tHIGH

tLOW

tSU.STA

tHD.STA

tHD.DAT

tSU.DAT

SDA IN

SDA OUT

tAA

tDH

tR

tSU.STO

tBUF

Figure 4-3. Write Cycle Timing

SCL: Serial Clock, SDA: Serial Data I/O

SCL

SDA

8th BIT

ACK

WORDn

STOP

CONDITION

(1)

twr

START

CONDITION

Notes: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal

clear/write cycle

7

8717B–SEEPR–6/10

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