AT24C256C-MAUL-T(2010) データシートの表示（PDF） - Atmel Corporation

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AT24C256C-MAUL-T
(Rev.:2010)

Two-wire Serial EEPROM 256K (32,768 x 8)

Atmel Corporation 

6. Write Operations

BYTE WRITE: A write operation requires two 8-bit data word addresses following the device address word and

acknowledgment. Upon receipt of this address, the EEPROM will again respond with a “0” and then clock in the

first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a “0”. The addressing

device, such as a microcontroller, must then terminate the write sequence with a stop condition. At this time the

EEPROM enters an internally-timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this

write cycle and the EEPROM will not respond until the write is complete (refer to Figure 9).

Figure 6-1. Byte Write

Note: * = DON’T CARE bit

PAGE WRITE: The 256K EEPROM is capable of 64-byte page writes.

A page write is initiated the same way as a byte write, but the microcontroller does not send a stop condition after

the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the

microcontroller can transmit up to 63 more data words. The EEPROM will respond with a “0” after each data word

received. The microcontroller must terminate the page write sequence with a stop condition (refer to Figure 10).

Figure 6-2. Page Write

Note: * = DON’T CARE bit

The data word address lower six bits are internally incremented following the receipt of each data word. The

higher data word address bits are not incremented, retaining the memory page row location. When the word

address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the

same page. If more than 64 data words are transmitted to the EEPROM, the data word address will “roll over” and

previous data will be overwritten. The address “roll over” during write is from the last byte of the current page to

the first byte of the same page.

ACKNOWLEDGE POLLING: Once the internally-timed write cycle has started and the EEPROM inputs are

disabled, acknowledge polling can be initiated. This involves sending a start condition followed by the device

address word. The read/write bit is representative of the operation desired. Only if the internal write cycle has

completed will the EEPROM respond with a “0”, allowing the read or write sequence to continue.

10 Atmel AT24C256C

8568C–SEEPR–5/10

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