DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

AT28C010-12DK(2005) データシートの表示(PDF) - Atmel Corporation

部品番号
コンポーネント説明
メーカー
AT28C010-12DK
(Rev.:2005)
Atmel
Atmel Corporation Atmel
AT28C010-12DK Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
DC and AC Operating
Range
or disabled by the user; the AT28C010-12DK is shipped from Atmel with SDP
disabled.
• SDP is enabled by the host system issuing a series of three write commands; three
specific bytes of data are written to three specific addresses (refer to Software Data
Protection Algorithm). After writing the 3-byte command sequence and after tWC the
entire AT28C010-12DK will be protected against inadvertent write operations. It
should be noted, that once protected the host may still perform a byte or page write
to the AT28C010-12DK. This is done by preceding the data to be written by the
same 3-byte command sequence used to enable SDP.
• Once set, SDP will remain active unless the disable command sequence is issued.
Power transitions do not disable SDP and SDP will protect the AT28C010-12DK
during power-up and power-down conditions. All command sequences must
conform to the page write timing specifications. The data in the enable and disable
command sequences is not written to the device and the memory addresses used in
the sequence may be written with data in either a byte or page write operation.
• After setting SDP, any attempt to write to the device without the 3-byte command
sequence will start the internal write timers. No data will be written to the device;
however, for the duration of tWC, read operations will effectively be polling
operations.
DEVICE IDENTIFICATION: An extra 128 bytes of EEPROM memory are available
to the user for device identification. By raising A9 to 12V ± 0.5V and using address
locations 1FF80H to 1FFFFH the bytes may be written to or read from in the same
manner as the regular memory array.
OPTIONAL CHIP ERASE MODE: The entire device can be erased using a 6-byte
software code. Please see Software Chip Erase application note for details.
Operating Temperature (Case)
VDD Power Supply
AT28C010-12DK-12
-55°C to +125°C
5V ± 10%
4 AT28C010-12DK
4259C–AERO–05/05

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]