AT28HC256N データシートの表示（PDF） - Atmel Corporation

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AT28HC256N

256 (32K x 8) High-speed Parallel EEPROM

Atmel Corporation 

AT28HC256N

Software Data Protection

Enable Algorithm(1)

LOAD DATA AA

TO

ADDRESS 5555

Software Data Protection Disable

Algorithm(1)

LOAD DATA AA

TO

ADDRESS 5555

LOAD DATA 55

TO

ADDRESS 2AAA

LOAD DATA 55

TO

ADDRESS 2AAA

LOAD DATA A0

TO

ADDRESS 5555

WRITES ENABLED(2)

LOAD DATA XX

TO

ANY ADDRESS(4)

LOAD LAST BYTE

TO

LAST ADDRESS

ENTER DATA

PROTECT STATE

Notes:

1. Data Format: I/O7 - I/O0 (Hex);

Address Format: A14 - A0 (Hex).

2. Write Protect state will be activated at end of write

even if no other data is loaded.

3. Write Protect state will be deactivated at end of

write period even if no other data is loaded.

4. 1 to 64 bytes of data are loaded.

LOAD DATA 80

TO

ADDRESS 5555

LOAD DATA AA

TO

ADDRESS 5555

LOAD DATA 55

TO

ADDRESS 2AAA

LOAD DATA 20

TO

ADDRESS 5555

LOAD DATA XX

TO

ANY ADDRESS(4)

EXIT DATA

PROTECT STATE(3)

LOAD LAST BYTE

TO

LAST ADDRESS

Software Protected Write Cycle Waveforms(1)(2)

tWP

tWPH

tAS

tDH

tAH

tBLC

tDS

tWC

Notes: 1. A6 through A14 must specify the same page address during each high to low transition of WE (or CE) after the software

code has been entered.

2. OE must be high only when WE and CE are both low.

9

3446B–PEEPR–4/04

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