AT43312A-SU データシートの表示（PDF） - Atmel Corporation

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AT43312A-SU

Self- and Bus- powered USB Hub Controller

Atmel Corporation 

Functional

Description

Summary

USB Ports

Hub Repeater

Serial Interface Engine

The Atmel AT43312A is a USB hub controller for use in a standalone hub as well as an

add-on hub for an existing non-USB peripheral such a PC display monitor or keyboard.

In addition to supporting the standard USB hub functionality, the AT43312A has addi-

tional features to enhance the user friendliness of the hub.

The AT43312A’s upstream port, Port0, is a full-speed port. A 1.5 kΩ pull-up resistor to

the 3.3V regulator output, CEXT, is required for proper operation. The downstream ports

support both full-speed as well as low-speed devices. 15 kΩ pull-down resistors are

required at their inputs.

Full-speed signal requirements demand controlled rise/fall times and impedance match-

ing of the USB ports. To meet these requirements, 22Ω resistors must be inserted in

series between the USB data pins and the USB connectors.

The Hub Repeater is responsible for port connectivity setup and tear-down. It also sup-

ports exception handling such as bus fault detection and recovery, and

connect/disconnect detection. Port0 is the root port and is connected to the root hub or

an upstream hub. When a packet is received at Port0, the AT43312A propagates it to all

the enabled downstream ports. Conversely, a packet from a downstream port is trans-

mitted from Port0.

The AT43312A supports downstream port data signaling at both 1.5 Mb/s and 12 Mb/s.

Devices attached to the downstream ports are determined to be either full-speed or low-

speed depending which data line (DP or DM) is pulled high. If a port is enumerated as

low-speed, its output buffers operate at a slew rate of 75 - 300 ns, and the AT43312A

will not propagate any traffic to that port unless it is prefaced with a preamble PID. Low-

speed data following the preamble PID is propagated to both low- and full-speed

devices. The AT43312A will enable low-speed drivers within four full-speed bit times of

the last bit of a preamble PID, and will disable them at the end of an EOP. Packets out of

Port0 are always transmitted using the full-speed drivers.

All the AT43312A ports independently drive and monitor their DP and DM pins so that

they are able to detect and generate the “J”, “K”, and SE0 bus signaling states. Each

hub port has single-ended and differential receivers on its DP and DM lines. The port I/O

buffers comply with the voltage levels and drive requirements as specified in the USB

Specifications Rev 1.0.

The Hub Repeater implements a frame timer which is timed by the 12 MHz USB clock

and gets reset every time an SOF token is received from the Host.

The Serial Interface Engine handles the USB communication protocol. It performs the

USB clock/data separation, the NRZI data encoding/decoding, bit stuffing, CRC genera-

tion and checking, USB packet ID decoding and generation, and data serialization and

de-serialization. The on chip phase locked loop generates the high frequency clock for

the clock/data separation circuit.

6 AT43312A

1255G–USB–05/06

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