AT49LV8192-20RI データシートの表示（PDF） - Atmel Corporation

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AT49LV8192-20RI

8-Megabit (512K x 16) CMOS Flash Memory

Atmel Corporation 

TOGGLE BIT: In addition to DATA polling the

AT49BV/LV8192 provides another method for determining

the end of a program or erase cycle. During a program or

erase operation, successive attempts to read data from the

device will result in I/O6 toggling between one and zero.

Once the program cycle has completed, I/O6 will stop tog-

gling and valid data will be read. Examining the toggle bit

may begin at any time during a program cycle.

HARDWARE DATA PROTECTION: Hardware features

protect against inadvertent programs to the

AT49BV/LV8192 in the following ways: (a) VCC sense: if

VCC is below 1.8V (typical), the program function is inhib-

ited. (b) VCC power on delay: once VCC has reached the

VCC sense level, the device will automatically time out 10

ms (typical) before programming. (c) Program inhibit: hold-

ing any one of OE low, CE high or WE high inhibits pro-

gram cycles. (d) Noise filter: pulses of less than 15 ns (typi-

cal) on the WE or CE inputs will not initiate a program

cycle.

INPUT LEVELS: While operating with a 2.7V to 3.6V

power supply, the address inputs and control inputs (OE,

CE, and WE) may be driven from 0 to 5.5V without

adversely affecting the operation of the device. The I/O

lines can only be driven from 0 to VCC + 0.6V.

4 AT49BV/LV8192(T)

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