AT88SC0808C-SI データシートの表示（PDF） - Atmel Corporation

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AT88SC0808C-SI

8 x 128 x 8 CryptoMemory™

Atmel Corporation 

Description

The AT88SC0808C member of the CryptoMemory family is a high-performance secure

memory providing 8 Kbits of user memory with advanced security and cryptographic

features built in. The user memory is divided into 8 zones, each of which may be individ-

ually set with different security access rights or combined together to provide space for 1

to 8 data files. The AT88SC0808C provides high security, low cost and ease of imple-

mentation for smart card applications without the need for a microprocessor operating

system. The embedded cryptographic engine provides for a dynamic, symmetric-mutual

authentication between the device and host, and for performing stream encryption for all

data and passwords exchanged between the device and host. Up to four unique key

sets may be used for these operations. The AT88SC0808C offers the ability to commu-

nicate with virtually any smart card reader using the asynchronous T = 0 protocol

defined in ISO 7816-3. For closed systems or applications using the device on a circuit

board, the AT88SC0808C will also communicate using a synchronous two-wire protocol

at clock speeds up to 1.5 MHz. In this communication mode, up to 15 devices may be

connected and individually addressed on the same serial data bus. The two-wire proto-

col may also be used for high-speed personalization of the device in card form.

Figure 1. Block Diagram

VCC

GND

Power

Management

SCL/CLK

SDA/IO

RST

Synchronous

Interface

Asynchronous

ISO Interface

Reset Block

Authentication,

Encryption and

Certification Unit

Data Transfer

Password

Verification

Answer to Reset

Random

Generator

EEPROM

Pin Descriptions

Supply Voltage (VCC)

Clock (SCL/CLK)

Serial Data (SDA/IO)

Reset (RST)

The VCC input is a 2.7V to 5.5V positive voltage supplied by the host.

In the asynchronous T = 0 protocol, the SCL/CLK input is used to provide the device

with a carrier frequency f. The nominal length of one bit emitted on I/O is defined as an

“elementary time unit” (ETU) and is equal to 372/f.

When the synchronous protocol is used, the SCL/CLK input is used to positive edge

clock data into the device and negative edge clock data out of the device.

The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and

may be wired with any number of other open drain or open collector devices. An exter-

nal pull-up resistor should be connected between SDA and VCC. The value of this

resistor and the system capacitance loading the SDA bus will determine the rise time of

SDA. This rise time will determine the maximum frequency during read operations. Low

value pull-up resistors will allow higher frequency operations while drawing higher aver-

age power supply current.

The AT88SC0808C provides an ISO 7816-3 compliant asynchronous answer to reset

sequence. When the reset sequence is activated, the device will output the data pro-

2 AT88SC0808C

2024BS–SMEM–10/02

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