AT88SC0808C-SI データシートの表示（PDF） - Atmel Corporation

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AT88SC0808C-SI

8 x 128 x 8 CryptoMemory™

Atmel Corporation 

Communication

Security Modes

Communications between the device and host operate in three basic modes. Standard

mode is the default mode for the device after power-up. Authentication mode is acti-

vated by a successful authentication sequence. Encryption mode is activated by a

successful encryption activation following a successful authentication.

Table 4. Communication Security Modes(1)

Mode

Configuration Data

User Data

Passwords

Standard

Clear

Clear

Clear

Authentication

Clear

Clear

Encrypted

Encryption

Clear

Encrypted

Encrypted

Note:

1. Configuration data include viewable areas of the Configuration Zone except the passwords:

MDC: Modification Detection Code.

MAC: Message Authentication Code.

Data Integrity Check

MDC

MAC

MAC

Security Options

Anti-tearing

Write Lock

In the event of a power loss during a write cycle, the integrity of the device’s stored data

may be recovered. This function is optional: the host may choose to activate the anti-

tearing function, depending on application requirements. When anti-tearing is active,

write commands take longer to execute, since more write cycles are required to com-

plete them, and data are limited to eight bytes.

Data are written first to a buffer zone in EEPROM instead of the intended destination

address, but with the same access conditions. The data are then written in the required

location. If this second write cycle is interrupted due to a power loss, the device will

automatically recover the data from the system buffer zone at the next power-up.

In two-wire mode, the host is required to perform ACK polling for up to 20 ms after write

commands when anti-tearing is active. At power-up, the host is required to perform ACK

polling, in some cases for up to 10 ms, in the event that the device needs to carry out the

data recovery process.

If a user zone is configured in the write lock mode, the lowest address byte of an 8-byte

page constitutes a write access byte for the bytes of that page.

Example: The write lock byte at $080 controls the bytes from $080 to $087.

$080

11011001

$081

xxxx xxxx

locked

$082

$083

$084

$085

$086

$087

@

xxxx xxxx

locked

xxxx xxxx

xxxx xxxx

xxxx xxxx

locked

xxxx xxxx

xxxx xxxx

$80

The write lock byte may also be locked by writing its least significant (rightmost) bit to

“0”. Moreover, when write lock mode is activated, the write lock byte can only be pro-

grammed – that is, bits written to “0” cannot return to “1”.

In the write lock configuration, only one byte can be written at a time. Even if several

bytes are received, only the first byte will be taken into account by the device.

6 AT88SC0808C

2024BS–SMEM–10/02

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