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AT89S852-12PC データシートの表示(PDF) - Atmel Corporation

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AT89S852-12PC
Atmel
Atmel Corporation Atmel
AT89S852-12PC Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin Configurations
PDIP
PLCC
PQFP/TQFP
Pin Description
VCC
Supply voltage.
GND
Ground.
Port 0
Port 0 is an 8 bit open drain bidirectional I/O port. As an
output port, each pin can sink eight TTL inputs. When 1s
are written to port 0 pins, the pins can be used as high-im-
pedance inputs.
Port 0 can also be configured to be the multiplexed low-or-
der address/data bus during accesses to external pro-
gram and data memory. In this mode, P0 has internal pul-
lups.
Port 0 also receives the code bytes during Flash program-
ming and outputs the code bytes during program verifica-
2
AT89S8252
tion. External pullups are required during program verifica-
tion.
Port 1
Port 1 is an 8 bit bidirectional I/O port with internal pullups.
The Port 1 output buffers can sink/source four TTL inputs.
When 1s are written to Port 1 pins, they are pulled high by
the internal pullups and can be used as inputs. As inputs,
Port 1 pins that are externally being pulled low will source
current (IIL) because of the internal pullups.
Some Port 1 pins provide additional functions. P1.0 and
P1.1 can be configured to be the timer/counter 2 external
count input (P1.0/T2) and the timer/counter 2 trigger input
(P1.1/T2EX), respectively.
(continued)

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