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ATA01502 データシートの表示(PDF) - ANADIGICS

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ATA01502
Anadigics
ANADIGICS Anadigics
ATA01502 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
ATA01502
APPLICATION INFORMATION
VDD
PIN
56pF
56pF
V DD1
V DD2
GND
GND
IIN
GND
V OUT
GND GND GND CBY CBY GN D C AGC GND
56pF
56pF
OUT
Figure 3: ATA 01502D1C Typical Bonding Diagram
Power Supplies and General Layout Considerations
The ATA01502D1C may be operated from a positive
supply as low as + 4.5 V and as high as + 6.0 V.
Below + 4.5 V, bandwidth, overload and sensitivity
will degrade, while at + 6.0 V, bandwidth, overload
and sensitivity improve (see “Bandwidth vs.
Temperature” curves). Use of surface mount
(preferably MIM type capacitors), low inductance
power supply bypass capacitors (>=56pF) are
essential for good high frequency and low noise
performance. The power supply bypass capacitors
should be mounted on or connected to a good low
inductance ground plane.
General Layout Considerations
Since the gain stages of the transimpedance
amplifier have an open loop bandwidth in excess of
1.0 GHz, it is essential to maintain good high
frequency layout practices. To prevent oscillations, a
low inductance RF ground plane should be made
available for power supply bypassing. Traces that
can be made short should be made short. The utmost
care should be taken to maintain very low capacitance
at the photodiode TIA interface (IIN), as excess
capacitance at this node will cause a degradation in
bandwidth and sensitivity (see Bandwidth vs. CT
curves).
CT = 0.5 pF
140
130
VDD = 5.5 V
120
VDD = 5.0 V
110
100
VDD = 4.5 V
90
-40
10
60
85
Temperature ( OC)
Figure 4: Bandwidth vs. Temperature
4
PRELIMINARY DATA SHEET - Rev 2
08/2001

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