ATA06212AD1C(Rev1) データシートの表示（PDF） - ANADIGICS
部品番号
コンポーネント説明
メーカー
ATA06212AD1C Datasheet PDF : 8 Pages
| |||
ATA06212AD1C
POWER SUPPLIES AND GENERAL LAYOUT CONSIDERATIONS
The ATA06212AD1C may be operated from a positive supply as low as + 4.5 V and as high as + 6.0 V.
Below + 4.5 V, bandwidth, overload and sensitivity will degrade, while at + 6.0 V, bandwidth, overload
and sensitivity improve (see “Bandwidth vs. Temperature”curves). Use of surface mount (preferably
MIM type capacitors), low inductance power supply bypass capacitors (>=56pF) are essential for
good high frequency and low noise performance. The power supply bypass capacitors should be
mounted on or connected to a good low inductance ground plane.
GENERAL LAYOUT CONSIDERATIONS
Since the gain stages of the transimpedance amplifier have an open loop bandwidth in excess of 1.0
GHz, it is essential to maintain good high frequency layout practices. To prevent oscillations, a low
inductance RF ground plane should be made available for power supply bypassing. Traces that can be
made short should be made short, and the utmost care should be taken to maintain very low capacitance
at the photodiode-TIA interface (I ); excess capacitance at this node will cause a degradation in
IN
bandwidth and sensitivity.
IIN CONNECTION
Bonding the detector cathode to I (and thus drawing current from the ATA06212D1C) improves the
IN
dynamic range. Although the detector may be used in the reverse direction for input currents not
exceeding 25 µA, the specifications for optical overload will not be met (refer to the equivalent circuit
diagram).
V CONNECTION
OUT
The output pad should be connected via a coupling capacitor to the next stage of the receiver channel
(filter or decision circuits), as the output buffers are not designed to drive a DC coupled 50 Ohm load
(this would require an output bias current of approximately 36 mA to maintain a quiescent 1.8 Volts
across the output load). If VOUT is connected to a high input impedance decision circuit (>500 Ohms),
then a coupling capacitor may not be required, although caution should be exercised since DC offsets
of the photo detector/TIA combination may cause clipping of subsequent gain or decision circuits.
SENSITIVITY AND BANDWIDTH
In order to guarantee sensitivity, the TIA is subjected to a comprehensive series of tests at the die sort
level (100% testing at 25 oC) to verify the DC and AC parametric performance (transimpedance and
bandwidth).
4
Share Link: 