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ATA6612 データシートの表示(PDF) - Atmel Corporation

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ATA6612 Datasheet PDF : 364 Pages
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ATA6612/ATA6613
Table 2-1. Pin Description (Continued)
Pin
20(1)
21(1)
22(1)
23(1)
24(1)
25(1)
26(1)
27(1)
28(1)
29(1)
30(1)
31(1)
32(1)
Symbol
NRES
WD_OSC
TM
MODE
KL_15
PVCC
VCC
VS
EN
NTRIG
WAKE
GND
LIN
Function
Watchdog and undervoltage reset output (open drain)
External resistor for adjustable watchdog timing
Tie to Ground – for factory use only
Connect to GND for normal watchdog operation or connect to VCC for debug mode
Ignition detection (edge sensitive)
Voltage regulator sense input
Voltage regulator output
Battery connection
LIN-transceiver enable input
Watchdog trigger input (negative edge)
System-basis-chip external wake-up input
Analog system GND
LIN-bus input/output
33
PD3
Port D 3 I/O line (INT1 OC2B/PCINT19)
34
PD4
Port D 4 I/O line (T0/XCK/PCINT20)
35
GND1 Ground
36
MCUVDD1 Microcontroller supply voltage
37
GND2 Ground
38
MCUVDD2 Microcontroller supply voltage
39
PB6
Port B 6 I/O line (TOSC1/XTAL1/PCINT6)
40
PB7
Port B 7 I/O line (TOSC2/XTAL2/PCINT7)
41
PD5
Port D 5 I/O line (T1/OC0B/PCINT21)
42
PD6
Port D 6 I/O line (AIN0/OC0A PCINT22)
43
PD7
Port D 7 I/O line (AIN1/PCINT23)
44
PB0
Port B 0 I/O line (ICP1/CLKO/PCINT0)
45
PB1
Port B 1 I/O line (OC1A/PCINT1)
46
PB2
Port B 2 I/O line (OC1B/SS/PCINT2)
47
PB3
Port B 3 I/O line (MOSI/OC2A/PCINT3)
48
PB4
Port B 4 I/O line (MISO/PCINT4)
Backside
Heat slug is connected to GND
Note: 1. This identifies the pins of the LIN SBC ATA6624
3
9111G–AUTO–05/10

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