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ATA6612 データシートの表示(PDF) - Atmel Corporation

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ATA6612 Datasheet PDF : 364 Pages
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ATA6612/ATA6613
3. LIN System-basis-chip Block
3.1 Features
Master and Slave Operation Possible
Supply Voltage up to 40V
Operating voltage VS = 5V to 27V
Typically 10 µA Supply Current During Sleep Mode
Typically 57 µA Supply Current in Silent Mode
Linear Low-drop Voltage Regulator:
Normal, Fail-safe, and Silent Mode
VCC = 5.0V ±2%
In Sleep Mode VCC is Switched Off
VCC- Undervoltage Detection (4 ms Reset Time) and Watchdog Reset Logical Combined at Open
Drain Output NRES
Negative Trigger Input for Watchdog
Boosting the Voltage Regulator Possible with an External NPN Transistor
LIN Physical Layer According to LIN 2.0, 2.1 Specification and SAEJ2602-2
Wake-up Capability via LIN-bus, Wake Pin, or Kl_15 Pin
INH Output to Control an External Voltage Regulator or to Switch off the Master Pull Up Resistor
TXD Time-out Timer
Bus Pin is Overtemperature and Short Circuit Protected versus GND and Battery
Adjustable Watchdog Time via External Resistor
Advanced EMC and ESD Performance
ESD HBM 8 kV at Pins LIN and VS According to STM5.1
3.2 Description
The LIN-SBC is a fully integrated LIN transceiver, which complies with the LIN 2.1 and
SAEJ2602-2 specifications. It has a low-drop voltage regulator for 5V/50 mA output and a win-
dow watchdog.
The LIN-SBC are designed to handle the low-speed data communication in vehicles, e.g., in
convenience electronics. Improved slope control at the LIN-driver ensures secure data commu-
nication up to 20 kBaud. Sleep Mode and Silent Mode guarantee very low current consumption.
5
9111G–AUTO–05/10

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