ATA6613 データシートの表示（PDF） - Atmel Corporation

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ATA6613

Microcontroller with LIN Transceiver, 5V Regulator and Watchdog

Atmel Corporation 

ATA6612/ATA6613

3.3 Functional Description

3.3.1

Physical Layer Compatibility

Since the LIN physical layer is independent from higher LIN layers (e.g., the LIN protocol layer),

all nodes with a LIN physical layer according to revision 2.1 can be mixed with LIN physical layer

nodes, which, according to older versions (i.e., LIN 1.0, LIN 1.1, LIN 1.2, LIN 1.3), are without

any restrictions.

3.3.2

Supply Pin (VS)

The LIN operating voltage is VS = 5V to 27V. An undervoltage detection is implemented to dis-

able data transmission if VS falls below VSth < 4V in order to avoid false bus messages. After

switching on VS, the IC starts in Fail-safe Mode, and the voltage regulator is switched on (i.e.,

output capability).

The supply current is typically 10 µA in Sleep Mode and 57 µA in Silent Mode.

3.3.3

Ground Pin (GND)

The IC is neutral on the LIN pin in the event of GND disconnection. It is able to handle a ground

shift up to 11.5% of VS. The mandatory system ground is pin 5.

3.3.4

Voltage Regulator Output Pin (VCC)

The internal voltage regulator is capable of driving loads with up to 50 mA. It is able to supply the

microcontroller and other ICs on the PCB and is protected against overloads by means of cur-

rent limitation and overtemperature shut-down. Furthermore, the output voltage is monitored

and will cause a reset signal at the NRES output pin if it drops below a defined threshold Vthun.

To boost up the maximum load current, an external NPN transistor may be used, with its base

connected to the VCC pin and its emitter connected to PVCC.

3.3.5

Voltage Regulator Sense Pin (PVCC)

The PVCC is the sense input pin of the voltage regulator. For normal applications (i.e., when

only using the internal output transistor), this pin is connected to the VCC pin. If an external

boosting transistor is used, the PVCC pin must be connected to the output of this transistor, i.e.,

its emitter terminal.

3.3.6

Bus Pin (LIN)

A low-side driver with internal current limitation and thermal shutdown and an internal pull-up

resistor compliant with the LIN 2.1 specification are implemented. The allowed voltage range is

between –27V and +40V. Reverse currents from the LIN bus to VS are suppressed, even in the

event of GND shifts or battery disconnection. LIN receiver thresholds are compatible with the

LIN protocol specification. The fall time from recessive to dominant bus state and the rise time

from dominant to recessive bus state are slope controlled.

7

9111G–AUTO–05/10

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