ATA6626C(2014) データシートの表示（PDF） - Atmel Corporation
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ATA6626C Datasheet PDF : 29 Pages
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4.3 Sleep Mode
A falling edge at EN when TXD is low switches the IC into Sleep Mode. The TXD Signal has to be logic low during the Mode
Select window (Figure 4-4 on page 10). In order to avoid any influence to the LIN-pin during switching into sleep mode it is
possible to switch the EN up to 3.2 µs earlier to LOW than the TXD. Therefore, the best and easiest way are two falling
edges at TXD and EN at the same time.The transmission path is disabled in Sleep Mode. The supply current IVSsleep from
VBatt is typically 10µA.
The VCC regulator is switched off. NRES and RXD are low. The internal slave termination between the LIN pin and VS pin is
disabled, only a weak pull-up current (typically 10µA) between the LIN pin and the VS pin is present. Sleep Mode can be
activated independently from the current level on the LIN, WAKE, or KL_15 pin.
A voltage less than the LIN Pre_Wake detection VLINL at the LIN pin activates the internal LIN receiver and switches on the
internal slave termination between the LIN pin and the VS pin.
A falling edge at the LIN pin followed by a dominant bus level maintained for a certain time period (> tbus) and a following
rising edge at pin LIN results in a remote wake-up request. The device switches from Sleep Mode to Fail-safe Mode.
The VCC regulator is activated, and the remote wake-up request is indicated by a low level at the RXD pin to interrupt the
microcontroller (see Figure 4-5 on page 11).
EN high can be used to switch directly from Sleep/Silent to Fail-safe Mode. If EN is still high after VCC ramp up and
undervoltage reset time, the IC switches to the Normal Mode.
Figure 4-4. Switch to Sleep Mode
Normal Mode
Sleep Mode
EN
TXD
NRES
VCC
Mode select window
td = 3.2μs
Delay time sleep mode
td_sleep = maximum 20μs
LIN
LIN switches directly to recessive mode
10 ATA6622C/ATA6624C/ATA6626C [DATASHEET]
4986O–AUTO–10/14
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