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ATA6622C(2014) データシートの表示(PDF) - Atmel Corporation

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ATA6622C
(Rev.:2014)
Atmel
Atmel Corporation Atmel
ATA6622C Datasheet PDF : 29 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
4.2 Silent Mode
A falling edge at EN when TXD is high switches the IC into Silent Mode. The TXD Signal has to be logic high during the
Mode Select window (see Figure 4-2). The transmission path is disabled in Silent Mode. The overall supply current from VBatt
is a combination of the IVSsi = 57µA plus the VCC regulator output current IVCC.
The internal slave termination between the LIN pin and the VS pin is disabled in Silent Mode, only a weak pull-up current
(typically 10µA) between the LIN pin and the VS pin is present. Silent Mode can be activated independently from the actual
level on the LIN, WAKE, or KL_15 pins.
If an undervoltage condition occurs, NRES is switched to low, and the IC changes its state to Fail-safe Mode.
A voltage less than the LIN Pre_Wake detection VLINL at the LIN pin activates the internal LIN receiver and switches on the
internal slave termination between the LIN pin and the VS pin.
Figure 4-2. Switch to Silent Mode
Normal Mode
Silent Mode
EN
TXD
NRES
Mode select window
td = 3.2μs
VCC
LIN
Delay time silent mode
td_silent maximum 20μs
LIN switches directly to recessive mode
8
ATA6622C/ATA6624C/ATA6626C [DATASHEET]
4986O–AUTO–10/14

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