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ATTINY15 データシートの表示(PDF) - Atmel Corporation

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ATTINY15
Atmel
Atmel Corporation Atmel
ATTINY15 Datasheet PDF : 85 Pages
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Pin Descriptions
VCC
GND
Port B (PB5..PB0)
Analog Pins
Internal Oscillators
Supply voltage pin.
Ground pin.
Port B is a 6-bit I/O port. PB4..0 are I/O pins that can provide internal pull-ups (selected
for each bit). PB5 is input or open-drain output. The use of pin PB5 is defined by a fuse
and the special function associated with this pin is External Reset. The port pins are tri-
stated when a reset condition becomes active, even if the clock is not running.
Port B also accommodates analog I/O pins. The Port B pins with alternate functions are
shown in Table 1.
Table 1. Port B Alternate Functions
Port Pin
Alternate Function
PB0
MOSI (Data Input Line for Memory Downloading)
AREF (ADC Voltage Reference)
AIN0 (Analog Comparator Positive Input)
PB1
MISO (Data Output Line for Memory Downloading)
OC1A (Timer/Counter PWM Output)
AIN1 (Analog Comparator Negative Input)
PB2
SCK (Serial Clock Input for Serial Programming)
INT0 (External Interrupt0 Input)
ADC1 (ADC Input Channel 1)
T0 (Timer/Counter0 External Counter Input)
PB3
ADC2 (ADC Input Channel 2)
PB4
ADC3 (ADC Input Channel 3)
PB5
RESET (External Reset Pin)
ADC0 (ADC Input Channel 0)
Up to four analog inputs can be selected as inputs to Analog-to-Digital Converter (ADC).
The internal Oscillator provides a clock rate of nominally 1.6 MHz for the system clock
(CK). Due to large initial variation (0.8 -1.6 MHz) of the internal Oscillator, a tuning capa-
bility is built in. Through an 8-bit control register – OSCCAL – the system clock rate can
be tuned with less than 1% steps of the nominal clock.
There is an internal PLL that provides a 16x clock rate locked to the system clock (CK)
for the use of the Peripheral Timer/Counter1. The nominal frequency of this peripheral
clock, PCK, is 25.6 MHz.
4 ATtiny15L
1187H–AVR–09/07

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