A8905CLB データシートの表示（PDF） - Allegro MicroSystems

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A8905CLB

3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING

Allegro MicroSystems 

8905

3-PHASE BRUSHLESS DC

MOTOR CONTROLLER/DRIVER

ELECTRICAL CHARACTERISTICS continued

Characteristic

CWD Threshold Voltage

Max. FLL Oscillator Frequency

Symbol

VTL

VTH

fOSC

IOUT(MAX) Accuracy

BRAKE Threshold

Transconductance Gain

Centertap Resistors

Back-EMF Hysteresis

—

VBRK

gm

RCT

—

Test Conditions

VDD = 5.1 V, TA = 25°C

VDD = 4.5 V, TA = 70°C

IOUT = 1 A

VBEMF - VCTAP at

FCOM Transition

Min.

0.80

2.4

20

—

—

1.4

0.26

5.0

15

-15

Limits

Typ. Max.

0.85 0.95

2.75 3.0

—

—

10

—

±20

—

1.7

2.0

0.35 0.50

10

13

25

40

-25 -40

Units

V

V

MHz

MHz

%

V

A/V

kΩ

mV

mV

SERIAL PORT TIMING CONDITIONS

CHIP SELECT

CLOCK

DATA

EA

C

D

B

C

D

Dwg. WP-019

A. Minimum CHIP SELECT setup time before CLOCK rising edge ...... 100 ns

B. Minimum CHIP SELECT hold time after CLOCK rising edge ........... 150 ns

C. Minimum DATA setup time before CLOCK rising edge .................... 150 ns

D. Minimum DATA hold time after CLOCK rising edge ........................ 150 ns

E. Minimum CLOCK low time before CHIP SELECT .............................. 50 ns

F. Maximum CLOCK frequency ........................................................... 3.3 MHz

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

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