BD3941FP データシートの表示（PDF） - ROHM Semiconductor

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BD3941FP

Power Management LSI Series for Automotive Body Control

ROHM Semiconductor 

zOperation Notes

1) Absolute maximum ratings

An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the

devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect

to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses.

2) GND voltage

The potential of GND pin must be minimum potential in all operating conditions.

3) Thermal design

Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.

4) Inter-pin shorts and mounting errors

Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if

pins are shorted together.

5) Actions in strong electromagnetic field

Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.

6) Testing on application boards

When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always

discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig or

fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when

transporting or storing the IC.

7) Regarding input pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.

P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor.

For example, the relation between each potential is as follows:

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual interference among

circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that

is lower than the GND (P substrate) voltage to an input pin, should not be used.

(PinA)

P+

N

P

Resistor

(PinB)

Transistor (NPN)

B

C

E

P

N

P+

N

Parasitic elements

GND

P+

N

P

N

P+

N

P substrate

Parasitic elements

or transistors

GND

(PinB)

BC

(PINA)

E

GND

Parasitic elements

or transistors

Parasitic elements

Fig.22 Example of a Simple Monolithic IC Architecture

8) Ground Wiring Pattern

When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single

ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do

not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components,

either.

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