BD4153EFV-E2(2008) データシートの表示（PDF） - ROHM Semiconductor
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BD4153EFV-E2 Datasheet PDF : 17 Pages
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●Description of operations
VCC
BD4153FV/EFV has an independent power input pin for an internal circuit operation in order to activate UVLO, Input logic, and
charge pump, the maximum current through which is rated to 2 mA. It is recommended to connect a bypass capacitor of 0.1 μF
or so to VCC pin.
EN
With an input of 2.3 volts or higher, this terminal turns to “High” level to activate the circuit, while it turns to “Low” level to
deactivate the circuit (with the standby circuit current of 35 μA), discharges each output and lowers output voltage If the input is
lowered to 0.8 volts or less.
V3_IN, V15_IN, and V3AUX_IN
These are the input terminals for each channel of a 3ch switch. V3_IN and V15_IN terminals have two pins each, which should
be short-circuited on the pc board with a thick conductor. And V3AUX IN terminal should be short-circuited to VCC terminal.
Through these three terminals, a big current runs (V3_IN: 1.35A, V3AUX_IN: 0.275 A, and V15_IN: 0.625 A). In order to lower
the output impedance of the power supply to be connected, it is recommended to provide ceramic capacitors (of B-characteristics
or better) between these terminals and ground; 1 μF or so between V3_IN and GND and between V15_IN and GND, and 0.1 μF
or so between V3AUX_IN and GND.
V3, V15, and V3AUX
These are the output terminals for each switch. V3 and V15 terminals have two pins each, which should be short-circuited on
the pc board and connected to an ExpressCard connector with a thick conductor as shortest as possible. In order to stabilize
the output, it is recommended to provide ceramic capacitors (of B-characteristics or better) between these terminals and ground;
10 μF or so between V3 and GND and between V15 and GND, and 1 μF or so between V3AUX and GND.
CPPE#
The pin used to find whether a PCI-Express signal compatible card is provided or not. Turns to “High” level with an input of 2.3
volts or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or less,
which means that a card is provided. Controls turning ON/OFF of the switch according to the status of the system.
CPUSB#
The pin used to find whether a USB2.0 signal compatible card is provided or not. Turns to “High” level with an input of 2.3 volts
or higher, which means that no card is provided, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which
means that a card is provided. Controls turning ON/OFF of the switch according to the system status.
SYSR
The pin used to detect the system status. Turns to “High” level with an input of 2.3 volts or higher, which means that the system
is activated, while it turns to “Low” level when the input is lowered to 0.8 volts or less, which means that the system is on standby.
PERST_IN#
The pin used to control a reset signal to a card (PERST#) from the system side. (Also referred to as “SysReset#” by PCMCIA.)
Turns to “High” level with an input of 2.3 volts or higher, and turns PERST# to “High” level AND with a “Power Good” output.
Turns to “Low” level and turns PERST# to “Low” level when the input is lowered to 0.8 volts or less.
PERST#
The pin used to provide a reset signal to a PCI-Express compatible card. The status is determined by each output, PERST#_IN,
CPPE# system status, and EN on/off status. Turns to “High” level and activates the PCI-Express compatible card only if each
output is within the “Power Good” threshold with the card kept inserted and with PERST_IN# turned to “High” level.
PERST#_DELAY
Delay during which the level at PERST# pin turns from Low to High may be set with a capacitor externally applied. The delay
time is determined by the regulated current (2 μA), the reference voltage (0.7 volts) inside the IC and the capacitance of the
capacitor externally applied. The delay time is specified as “at least 1 ms” in “ExpressCard Standard”. It does not synchronize
with PERST_IN#, and it synchronizes only with a “Power Good” output inside the IC. Turns to “Low” level when SW is turned
OFF.
OC
Turns its output to “Low” level if an overcurrent condition is detected. This open drain output may be pulled up to 3.6 volts power
supply via resistor.
OC-Delay
Delay during which the level at OC pin turns from High to Low may be set with a capacitor externally applied. The delay time is
determined by the regulated current (2 μA), the reference voltage (0.7 volts) inside the IC and the capacitance of the capacitor
externally applied. May be used to control with the OC status fed back to the system. If fed back to EN terminal of this IC, it
may be used to turn OFF the output that is provided when an overcurrent condition is detected.
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