BD4154FV-E2 データシートの表示（PDF） - ROHM Semiconductor
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BD4154FV-E2 Datasheet PDF : 16 Pages
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BD4154FV
●Block Diagram
Technical Note
3.3V
V3_IN1
4
5
V3_IN2
3.3V
V3AUX_IN
18
VD
TSD,CL,UVLO
VD
V3-1 3.3V/1.30A
6
7
V3-2
3.3V AUX/275mA
17
V3AUX
1.5V
V15_IN1
15
V15_IN2
16
CPPE#
12
CPUSB#
11
SYSR
3
EN
2
TSD,CL,UVLO_AUX
V15-1 1.5V/625mA
14
VD
V3AUX_IN
Input
logic
TSD,CL,UVLO
Power
good
EN,SYSR,CPUSB#,CPPE#
V3AUX_IN Thermal
TSD
protection
V3_IN,V3AUX_IN,V15_IN
CL
V3,V3AUX,V15
Reference
Block
Charge
Pump
V3_IN
V3AUX_IN
VD V15_IN
Under
voltage
lock out
UVLO
UVLO_AUX
V15-2
19 RCLKEN
8 PERST#
1 PERST_IN#
10
GND
●PIN CONFIGRATION
●PIN FUNCTION
PERST_IN# 1
EN 2
SYSR 3
V3_IN1 4
V3_IN2 5
V3_1 6
V3_2 7
PERST# 8
TEST 9
GND 10
20 NC
19 RCLKEN
18 V3AUX_IN
17 V3AUX
16 V15_IN2
15 V15_IN1
14 V15_2
13 V15_1
12 CPPE#
11 CPUSB#
SSOP-B20 Package
PIN No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN NAME
PERST_IN#
EN
SYSR
V3_IN1
V3_IN2
V3_1
V3_2
PERST#
TEST
GND
CPUSB#
CPPE#
V15_1
V15_2
V15_IN1
V15_IN2
V3AUX
V3AUX_IN
RCLKEN
NC
PIN FUNCTION
PERST# control input pin (SysReset#)
Enable input pin
Logic input pin
V3 input pin 1
V3 input pin 2
V3 output pin 1
V3 output pin 2
Logic output pin
Test pin
GND pin
Logic input pin
Logic input pin
V15 output pin 1
V15 output pin 2
V15 input pin 1
V15 input pin 2
V3AUX output pin
V3AUX input pin 1
Reference clock enable signal/
Power good signal (No delay)
Non connection
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6/15
2010.04 - Rev.B
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