BGX7221 データシートの表示（PDF） - NXP Semiconductors.
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BGX7221 Datasheet PDF : 20 Pages
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NXP Semiconductors
BGX7221
Dual receiver down mixer
Table 2. Pin description …continued
Symbol
Pin
Type [1]
VCC(REG)
POFF_1
21
P
22
I
n.c.
23
-
POFF_2
24
I
LO_GND
25
G
LO_GND
26
G
LO_IN
27
I
n.c
28
-
n.c
29
-
VCC(IF)(A)
IF_GND_A
30
P
31
G
IF_OUT_N_A
32
O
IF_OUT_P_A
33
O
IF_GND_A
34
G
n.c.
35
-
VCC(RF)(A)
36
P
Exposed paddle
-
G
[1] G: ground; I: input; O: output; P: power.
7. Functional description
Description
internal regulator power supply
logic input to power-off mixer
not connected; to be tied to ground
logic input to power-off mixer
LO ground
LO ground
single-ended local oscillator positive input
not connected; to be tied to ground
not connected; to be tied to ground
IF amplifier power supply; mixer A
IF amplifier mixer; mixer A
symmetrical IF negative output; mixer A
symmetrical IF positive output; mixer A
IF ground; mixer A
not connected; to be tied to ground
RF power supply; mixer A
exposed paddle; must be connected to RF and DC
ground
7.1 Power-up control
Table 3.
Mode
Active
Idle
Main
Diversity
Shutdown control
Description
Function
mixers A and B active
shutdown disabled
mixers A and B OFF; current supplied to shutdown enabled
LO buffer
mixer A active; mixer B OFF
partial shutdown
mixer B active; mixer A OFF
partial shutdown
POFF_1
0
1
0
1
POFF_2
0
0
1
1
Power-up enable pins to allow each mixer to be placed in Power-down mode. These pins
also enable the dedicated LO buffers for individual signal paths. A common LO input
stage remains active whatever the state of the power off control inputs, in order to
maintain good LO port matching. The time required to pass between active and inactive
states is less than 10 s. If the pins are left open or tied to ground, both mixers will be in
active state.
BGX7221
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 8 August 2012
© NXP B.V. 2012. All rights reserved.
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