BS616UV4016ECG10 データシートの表示（PDF） - Brilliance Semiconductor
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BS616UV4016ECG10 Datasheet PDF : 10 Pages
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BSI
n DATA RETENTION CHARACTERISTICS (TA = -40OC to +85OC)
SYMBOL
PARAMETER
TEST CONDITIONS
VDR
VCC for Data Retention
ICCDR(3)
Data Retention Current
tCDR
Chip Deselect to Data
Retention Time
tR
Operation Recovery Time
1. VCC=1.2V, TA=25OC.
2. tRC = Read Cycle Time.
3. ICCRD_Max. is 1.2uA at TA=70OC.
CE≧VCC-0.2V,
VIN≧VCC-0.2V or VIN≦0.2V
CE≧VCC-0.2V,
VIN≧VCC-0.2V or VIN≦0.2V
See Retention Waveform
BS616UV4016
MIN.
1.2
TYP. (1)
--
MAX.
--
UNITS
V
--
0.15
1.7
uA
0
--
tRC (2)
--
--
ns
--
ns
n LOW VCC DATA RETENTION WAVEFORM (1) (CE Controlled)
VCC
CE
VCC
tCDR
VIH
Data Retention Mode
VDR≧1.0V
CE≧VCC - 0.2V
VCC
tR
VIH
n AC TEST CONDITIONS
(Test Load and Input/Output Reference)
Input Pulse Levels
Vcc / 0V
Input Rise and Fall Times
Input and Output Timing
Reference Level
Output Load
tCLZ, tOLZ, tCHZ, tOHZ, tWHZ
Others
1V/ns
0.5Vcc
CL = 5pF+1TTL
CL = 30pF+1TTL
Output
1 TTL
CL(1)
VCC
GND
1. Including jig and scope capacitance.
ALL INPUT PULSES
90%
10%
→←
Rise Time:
1V/ns
90%
10%
→←
Fall Time:
1V/ns
n KEY TO SWITCHING WAVEFORMS
WAVEFORM INPUTS
OUTPUTS
MUST BE
STEADY
MAY CHANGE
FROM “H” TO “L”
MAY CHANGE
FROM “L” TO “H”
DON’T CARE
ANY CHANGE
PERMITTED
DOES NOT
APPLY
MUST BE
STEADY
WILL BE CHANGE
FROM “H” TO “L”
WILL BE CHANGE
FROM “L” TO “H”
CHANGE :
STATE UNKNOW
CENTER LINE IS
HIGH INPEDANCE
“OFF” STATE
R0201-BS616UV4016
4
Revision 1.3
Sep. 2005
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