SAA7212 データシートの表示（PDF） - Philips Electronics

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SAA7212

Integrated MPEG AVG decoder

Philips Electronics 

Philips Semiconductors

Integrated MPEG AVG decoder

SYMBOL

VSS

CP81MEXT

CP81M

VDD

SDRAM_ADDR 8

SDRAM_ADDR 9

SDRAM_ADDR 11

VSS

SDRAM_ADDR 7

SDRAM_ADDR 10

SDRAM_ADDR 6

VDD

SDRAM_ADDR 0

SDRAM_ADDR 5

SDRAM_ADDR 1

VSS

SDRAM_ADDR 4

SDRAM_ADDR 2

SDRAM_ADDR 3

VSSCO

VDDCO

VDD

Test 5

Test 6

HS

VS

VSS

YUV 0

YUV 1

YUV 2

YUV 3

VDD

YUV 4

YUV 5

YUV 6

YUV 7

Test 4

GRPH

Test 3

VDDAN

VSSAN

1998 Sep 07

PIN

DESCRIPTION

82 ground for pad ring

83 81 MHz SDRAM clock return path

84 81 MHz SDRAM memory clock

85 3.3 V supply for pad ring

86 SDRAM address

87 SDRAM address

88 SDRAM address

89 ground for pad ring

90 SDRAM address

91 SDRAM address

92 SDRAM address

93 3.3 V supply for pad ring

94 SDRAM address

95 SDRAM address

96 SDRAM address

97 ground for pad ring

98 SDRAM address

99 SDRAM address

100 SDRAM address

101 ground for core logic

102 3.3 V supply for core logic

103 3.3 V supply for pad ring

104 IC test interface (see note 2)

105 IC test interface (see note 2)

106 horizontal synchronization

107 vertical synchronization

108 ground for pad ring

109 YUV video output at 27 MHz

110 YUV video output at 27 MHz

111 YUV video output at 27 MHz

112 YUV video output at 27 MHz

113 3.3 V supply for pad ring

114 YUV video output at 27 MHz

115 YUV video output at 27 MHz

116 YUV video output at 27 MHz

117 YUV video output at 27 MHz

118 IC test interface (see note 3)

119 indicator for graphics information

120 IC test interface (see note 4)

121 3.3 V supply for analog blocks

122 ground for analog blocks

8

Preliminary specification

SAA7212

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