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Q67060-S6311 データシートの表示(PDF) - Infineon Technologies

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Q67060-S6311
Infineon
Infineon Technologies Infineon
Q67060-S6311 Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin
1
2
3
4
5
6
7
Data Sheet BTS6510
Symbol
OUT
OUT
IN
Vbb
IS
OUT
OUT
Function
O Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications!3)
O Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications!3)
I Input, activates the power switch in case of short to ground
+
Positive power supply voltage, the tab is electrically connected to this pin.
In high current applications the tab should be used for the Vbb connection
instead of this pin4).
S Diagnostic feedback providing a sense current proportional to the load
current; zero current on failure (see Truth Table on page 6)
O
Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications!3)
O
Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications!3)
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 4)
Supply voltage for short circuit protection,
Tj,start =-40 ...+150°C: (EAS limitation see diagram on page 9)
Load current (short circuit current, see page 5)
Load dump protection VLoadDump = VA + Vs, VA = 13.5 V
RI5) = 2 , RL = 0.54 , td = 200 ms,
IN, IS = open or grounded
Operating temperature range
Storage temperature range
Power dissipation (DC), TC 25 °C
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, Tj,start = 150°C, TC = 150°C const.,
IL = 20 A, ZL = 7.5 mH, 0 , (see diagrams on page 9 )
Electrostatic discharge capability (ESD)
Human Body Model acc. MIL-STD883D, method 3015.7 and ESD
assn. std. S5.1-1993, C = 100 pF, R = 1.5 k
Current through input pin (DC)
Current through current sense status pin (DC)
see internal circuit diagrams on page 7
Symbol
Vbb
Vbb
IL
VLoad dump6)
Tj
Tstg
Ptot
EAS
VESD
IIN
IIS
Values Unit
42 V
34 V
self-limited A
75 V
-40 ...+150 °C
-55 ...+150
170 W
1.5
J
4 kV
+15 , -250 mA
+15 , -250
3) Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current capability
and decrease the current sense accuracy
4) Otherwise add about 0.3 mto the RON if the pin is used instead of the tab.
5) RI = internal resistance of the load dump test pulse generator.
6) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.
Infineon Technologies AG
Page 2 of 15
2000-Mar-29

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