PDM34078SA10QA データシートの表示（PDF） - Paradigm Technology
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コンポーネント説明
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PDM34078SA10QA
Paradigm Technology
PDM34078SA10QA Datasheet PDF : 14 Pages
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PDM34078
AC Electrical Characteristics
Parameter
Cycle time
Symbol
tCYC
-6 ns
10
-7 ns
12.5
-8 ns
15
-10 ns
16.7
-12 ns
20
Type
Min.
Units
ns
1
Clock access time (0 pF load)
tCQ0
5
6
7
9
11
Max.
ns
Clock to output valid (Std. load)
tCQ
6
7
8
10
12
Max.
ns
Clock to output invalid
Clock to output high-Z
tCQX
2
2
2
2
2
Min.
ns
tCHZ
2
2
2
2
2
Min.
ns
2
10
12.5
15
16.7
20
Max.
Clock pulse width high
Clock pulse width low
OE to output valid
OE to output low-Z
OE to output high-Z
ZZ standby time
ZZ recovery time
SETUP TIMES
tCH
4
5
5
6
6
Min.
ns
tCL
4
5
5
6
6
Min.
ns
3
tOE
5
5
5
6
6
Min.
ns
tOLZ
0
0
0
0
0
Min.
ns
tOHZ
tZZS
5
5
5
6
6
Max.
ns
100
100
100
100
100
Max.
ns
4
tZZREC
100
100
100
100
100
Min.
ns
Address
tAS
2.5
2.5
2.5
2.5
3
Min.
ns
Address status (ADSC, ADSP)
tAAS
2.5
2.5
2.5
2.5
3
Min.
ns
5
Address advance setup (ADV)
tAAS
2.5
2.5
2.5
2.5
3
Min.
ns
Write signals (BWx, GW)
tWS
2.5
2.5
2.5
2.5
3
Min.
ns
Data in
Chip enables (CE, CE2, CE2)
tDS
2.5
2.5
2.5
2.5
3
Min.
ns
tCES
2.5
2.5
2.5
2.5
3
Min.
ns
6
HOLD TIMES
Address
tAH
0.5
0.5
0.5
0.5
0.5
Min.
ns
Address status (ADSC, DSP)
tADSH
0.5
0.5
0.5
0.5
0.5
Min.
ns
7
Address advance (ADV)
tAAH
0.5
0.5
0.5
0.5
0.5
Min.
ns
Write eignals (BWx, GW)
tWH
0.5
0.5
0.5
0.5
0.5
Min.
ns
Data in
Chip enables (CE, CE2, CE2)
tDH
0.5
0.5
0.5
0.5
0.5
Min.
ns
tCEH
0.5
0.5
0.5
0.5
0.5
Min.
ns
8
9
10
11
12
Rev 1.0 - 5/01/98
9
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