PDM34088SA10Q データシートの表示（PDF） - Paradigm Technology
部品番号
コンポーネント説明
メーカー
PDM34088SA10Q
Paradigm Technology
PDM34088SA10Q Datasheet PDF : 14 Pages
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PRELIMINARY
PDM34088
AC Electrical Characteristics
Parameter
Cycle time
Symbol
tCYC
-4 ns *
7.5
-6 ns
10
-7 ns
12
-8 ns
15
-12 ns
20
Type
Min.
Units
ns
1
Clock to output valid (Std. load)
tCQ
4
5
6
7
8
Max.
ns
Clock to output invalid
Clock to output high-Z
Clock pulse width high
Clock pulse width low
OE to output valid
OE to output low-Z
OE to output high-Z
ZZ standby time
ZZ recovery time
SETUP TIMES
tCQX
2
2
2
2
2
Min.
ns
tCHZ
4
5
5
6
6
Max.
ns
2
tCH
2.5
4
4.5
5
6
Min.
ns
tCL
2.5
4
4.5
5
6
Min.
ns
tOE
4
5
5
5
6
Max.
ns
tOLZ
0
0
0
0
0
Min.
ns
3
tOHZ
4
4
5
6
6
Max.
ns
tZZS
25
100
100
100
100
Max.
ns
tZZREC
25
100
100
100
100
Min.
ns
4
Address
tAS
2.0
2.5
2.5
2.5
3
Min.
ns
Address status (ADSC, ADSP)
tAAS
2.0
2.5
2.5
2.5
3
Min.
ns
Address advance setup (ADV)
tAAS
2.0
2.5
2.5
2.5
3
Min.
ns
5
Write signals (BWx, GW)
tWS
2.0
2.5
2.5
2.5
3
Min.
ns
Data in
tDS
2.0
2.5
2.5
2.5
3
Min.
ns
Chip enables (CE, CE2, CE2)
HOLD TIMES
tCES
2.0
2.5
2.5
2.5
3
Min.
ns
6
Address
tAH
0.5
0.5
0.5
0.5
0.5
Min.
ns
Address status (ADSC, DSP)
tADSH
0.5
0.5
0.5
0.5
0.5
Min.
ns
Address advance (ADV)
Write signals (BWx, GW)
tAAH
0.5
0.5
0.5
0.5
0.5
Min.
ns
tWH
0.5
0.5
0.5
0.5
0.5
Min.
ns
7
Data in
tDH
0.5
0.5
0.5
0.5
0.5
Min.
ns
Chip enables (CE, CE2, CE2)
tCEH
0.5
0.5
0.5
0.5
0.5
Min.
ns
* VCC = 3.3V + 5%
8
9
10
11
12
Rev 2.1 - 5/01/98
9
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