MU9C8338 データシートの表示（PDF） - Music Semiconductors

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MU9C8338

10/100Mb Ethernet Filter Interface

Music Semiconductors 

MU9C8338 10/100Mb Ethernet Filter Interface

Pin Descriptions

LANCAM Interface

See Timing Diagrams: Timing Data for LANCAM

Interface.

DQ[15:0] (LANCAM Bus, Input/Output, Tri-state, TTL)

DQ[15: 0] tri-state 16- bit bus transfers data or instructions

between the MU9C8338 and the LANCAM. When no

data or instructions are present on the bus, the bus goes

HIGH-Z.

/E (LANCAM Bus Enable, Output, Tri-state, TTL)

The /E chip enable is taken LOW to initiate LANCAM

activity. On LANCAM read cycles, /E is taken HIGH after

the MU9C8338 registers the data.

/W (LANCAM Bus Write, Output, Tri-state, TTL)

The MU9C8338 outputs /W (read/write select) to control

the direction of data flow between the MU9C8338 and the

LANCAM. If /W is LOW at the falling edge of /E, the

MU9C8338 outputs data on the DQ[15:0] bus for the

LANCAM as input. When /W is HIGH at the falling edge

of /E, the LANCAM outputs data on the DQ[15:0] bus to

the MU9C8338 as input.

/CM (LANCAM Bus Command Mode, Output, Tri-state,

TTL)

The MU9C8338 outputs /CM Data/Command Select to

control whether the LANCAM interprets the DQ[15:0]

bus contents as command information or data. If both /CM

and /W are LOW at the falling edge of /E, the MU9C8338

outputs an instruction for the LANCAM to execute or a

value for one of the LANCAM configuration registers. If

/CM is LOW while /W is HIGH, then the LANCAM will

output data from one of its configuration registers to the

MU9C8338. If /CM is HIGH while /W is LOW, the

MU9C8338 will output data for the LANCAM to place in

one of its data registers or memory. If /CM is HIGH while

/W is HIGH, the LANCAM outputs data from one of its

data registers or memory to the MU9C8338.

/EC (LANCAM Bus Enable Chain, Output, Tri-state,

TTL)

The Daisy Chain Enable signal performs two functions.

The /EC signal enables the LANCAMs /MF output to

show the results of a comparison. If /EC is LOW at the

falling edge of /E in a cycle, the /MF flag output is

enabled; otherwise, /MF is held HIGH. The /EC signal

also enables the /MF-/MI daisy chain that serves to select

the device with the highest-priority match in a string of

LANCAMs.

/MI (LANCAM Bus Match Flag, Input, TTL)

The /MI LANCAM Match flag input is used to indicate to

the MU9C8338 the conditions of the LANCAM Match

flag. The /MF output from the LANCAM should be

connected to this pin. If more than one LANCAM is used,

/MI should be connected to the /MF pin of the last

LANCAM in the daisy chain.

/FI (LANCAM Bus Full Flag, Input, TTL)

The /FI LANCAM Full flag input is used to indicate to the

MU9C8338 the condition of the LANCAM Full flag. The

/FF output from the LANCAM should be connected to this

pin. If more than one LANCAM is used, /FI should be

connected to the /FF of the last device in the daisy chain.

/RESET_LC (Reset LANCAM, Output, TTL)

/RESET_LC is LOW whenever /RESET is LOW. It is

taken HIGH only by writing to bit 0 in the System

Dynamic Configuration (SDCFG) register. See SDCFG

register information.

Test

SC_ENB (Scan Enable)

Enables scan chain for testing. Pin may be left

unconnected or tied to GND for normal operation

TST_HLD, TST_HLD2 (Test Hold)

Enables test mechanism. Pins may be left unconnected or

tied to GND for normal operation.

JTAG

Note: Please refer to IEEE Standard 1149.1 for information on

using the mandatory JTAG functions. The optional HIGH-Z

function is implemented and may be activated by writing 0011 to

the JTAG Instruction register.

/TRST (JTAG Reset, Input)

The /TRST is the Test Reset pin. It is internally pulled up

with a 3k minimum resistor. It must be tied to /RESET or

tied LOW when the JTAG port is not used.

TMS (JTAG Test Mode Select, Input)

The TMS input is the Test Mode Select input. This pin is

internally pulled up with a 3k minimum resistor.

TCK (JTAG Test Clock, Input)

The TCK input is the Test Clock input. It can be tied at a

valid logic level 1 when not in use. This pin is internally

pulled up with a 3k minimum resistor.

TDI (JTAG Test Data Input, Input)

The TDI input is the Test Data input. This pin is internally

pulled up with a 3k minimum resistor.

TDO (JTAG Test Data Output, Output)

The TDO output is the Test Data output.

Power and Ground

VDD, GND (Positive Power Supply, Ground)

These pins are the power supply connections to the

MU9C8338. VDD must meet the voltage supply

requirements in the Operating Conditions section relative

to the GND pins, which are at 0 Volts (system reference

potential), for correct operation of the device.

6

Rev. 1a

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