74LV11N データシートの表示（PDF） - Philips Electronics
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74LV11N Datasheet PDF : 10 Pages
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Philips Semiconductors
Triple 3-input AND gate
Product specification
74LV11
FEATURES
• Optimized for Low Voltage applications: 1.0 to 3.6 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Typical VOLP (output ground bounce) t 0.8 V at VCC = 3.3 V,
Tamb = 25°C
• Typical VOHV (output VOH undershoot) u 2 V at VCC = 3.3 V,
Tamb = 25°C
• Output capability: standard
• ICC category: SSI
DESCRIPTION
The 74LV11 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT11.
The 74LV11 provides the 3-input AND function.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf v2.5 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/tPLH
Propagation delay
nA, nB, nC to nY
CL = 15 pF;
VCC = 3.3 V
CI
Input capacitance
CPD
Power dissipation capacitance per gate See Notes 1 and 2
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi )ȍ (CL × VCC2 fo) where:
fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
ȍ (CL VCC2 fo) = sum of the outputs.
2. The condition is VI = GND to VCC.
TYPICAL
10
3.5
18
ORDERING INFORMATION
PACKAGES
14-Pin Plastic DIL
14-Pin Plastic SO
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +125°C
74LV11 N
–40°C to +125°C
74LV11 D
–40°C to +125°C
74LV11 DB
–40°C to +125°C
74LV11 PW
NORTH AMERICA
74LV11 N
74LV11 D
74LV11 DB
74LV11PW DH
UNIT
ns
pF
pF
PKG. DWG. #
SOT27-1
SOT108-1
SOT337-1
SOT402-1
PIN DESCRIPTION
FUNCTION TABLE
PIN NUMBER
SYMBOL NAME AND FUNCTION
INPUTS
OUTPUT
1, 3, 9
1A – 3A Data inputs
nA
nB
nC
nY
2, 4, 10
1B – 3B Data inputs
L
L
L
L
7
12, 6, 8
13, 5, 11
14
GND
1Y – 3Y
1C – 3C
VCC
Ground (0 V)
Data outputs
Data inputs
Positive supply voltage
L
L
H
L
L
H
L
L
L
H
H
L
H
L
L
L
H
L
H
L
H
H
L
L
H
H
H
H
NOTES:
H = HIGH voltage level
L = LOW voltage level
1998 Apr 20
2
853–1894 19256
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