CAT22C10 データシートの表示（PDF） - Catalyst Semiconductor => Onsemi

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CAT22C10

256-Bit Nonvolatile CMOS Static RAM

Catalyst Semiconductor => Onsemi 

CAT22C10

Write

With the chip enabled and the nonvolatile functions

inhibited, the Write Enable (WE) pin will select the write

mode when driven to a low level. In this mode, the

address must be supplied for the byte being written.

After the set-up time (tAS), the input data must be

supplied to pins I/O0–I/O3. When these conditions, in-

cluding the write pulse width time (tWP) are met, the data

will be written to the specified location in the Static RAM.

A write function may also be initiated from the standby

mode by driving WE low, inhibiting the nonvolatile func-

tions, supplying valid addresses, and then taking CS low

and supplying input data.

Figure 2. Write Cycle Timing

ADDRESS

CS

tAS

WE

DATA IN

DATA OUT

tWC

tCW

tWP

tWR

tDW

tDH

DATA VALID

tWZ

tOW

HIGH-Z

5153 FHD F04

Figure 3. Early Write Cycle Timing

ADDRESS

CS

tAS

WE

DATA IN

DATA OUT

tWC

tCW

tWP

tDW

DATA VALID

HIGH-Z

tWR

tDH

5153 FHD F05

7

Doc. No. 25018-0A 2/98 N-1

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