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CAT25010LA データシートの表示(PDF) - Catalyst Semiconductor => Onsemi

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CAT25010LA
Catalyst
Catalyst Semiconductor => Onsemi Catalyst
CAT25010LA Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CAT25010, CAT25020, CAT25040
ABSOLUTE MAXIMUM RATINGS(1)
Storage Temperature
Voltage on Any Pin with Respect to Ground(2)
RELIABILITY CHARACTERISTICS(3)
Symbol
NEND(4)
TDR
Parameter
Endurance
Data Retention
Min
1,000,000
100
-65°C to +150°C
-0.5 V to +6.5 V
Units
Program/ Erase Cycles
Years
D.C. OPERATING CHARACTERISTICS
VCC = 1.8 V to 5.5 V, TA = -40°C to 85°C, unless otherwise specified.
Symbol Parameter
Test Conditions
Min
Max Units
ICC
ISB1
ISB2
IL
ILO
VIL
VIH
VOL1
VOH1
VOL2
VOH2
Supply Current
Read, Write, VCC = 5.0V, fSCK = 10MHz,
SO open
2
mA
Standby Current
Standby Current
VIN = GND or VCC , CS = VCC , WP = VCC ,
VCC = 5V
VIN = GND or VCC , CS = VCC , WP = GND,
VCC = 5V
2
µA
4
µA
Input Leakage Current
Output Leakage Current
VIN = GND or VCC
CS = VCC , VOUT = GND or VCC
-2
2
µA
-1
1
µA
Input Low Voltage
-0.5
0.3VCC
V
Input High Voltage
0.7VCC VCC + 0.5 V
Output Low Voltage
VCC > 2.5V, IOL = 3.0mA
0.4
V
Output High Voltage
VCC > 2.5V, IOH = -1.6mA
VCC - 0.8V
V
Output Low Voltage
VCC > 1.8V, IOL = 150µA
0.2
V
Output High Voltage
VCC > 1.8V, IOH = -100µA
VCC - 0.2V
V
PIN CAPACITANCE(3)
TA = 25°C, f = 1 MHz, VCC = 5V
Symbol Test Conditions
Max
Conditions
Units
COUT
Output Capacitance (SO)
8
VOUT = 0 V
pF
CIN
Input Capacitance (CS, SCK, SI, WP, HOLD)
6
VIN = 0 V
pF
Note:
(1) Stresses above those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The DC input voltage on any pin should not be lower than -0.5V or higher than VCC + 0.5V. During transitions, the voltage on any pin may
undershoot to no less than -1.5 V or overshoot to no more than VCC + 1.5V, for periods of less than 20ns.
(3) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100
and JEDEC test methods.
(4) Page Mode, VCC = 5 V, 25°C
Doc. No. 1006, Rev. S
2
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice

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