CLC2008 データシートの表示（PDF） - Cadeka Microcircuits LLC.
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CLC2008 Datasheet PDF : 17 Pages
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Data Sheet
Enable/Disable Function (CLC1018)
The CLC1018 offers an active-low disable pin that can be
used to lower its supply current. Leave the pin floating to
enable the part. Pull the disable pin to the negative supply
(which is ground in a single supply application) to disable
the output. During the disable condition, the nominal
supply current will drop to below 30μA and the output will
be at high impedance with about 2pF capacitance.
Power Dissipation
Power dissipation should not be a factor when operating
under the stated 1k ohm load condition. However,
applications with low impedance, DC coupled loads
should be analyzed to ensure that maximum allowed
junction temperature is not exceeded. Guidelines listed
below can be used to verify that the particular application
will not cause the device to operate beyond it’s intended
operating range.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction
temperature, the package thermal resistance value
ThetaJA (ӨJA) is used along with the total die power
dissipation.
TJunction = TAmbient + (ӨJA × PD)
Where TAmbient is the temperature of the working environment.
In order to determine PD, the power dissipated in the load
needs to be subtracted from the total power delivered by
the supplies.
PD = Psupply - Pload
Supply power is calculated by the standard power
equation.
Psupply = Vsupply × IRMS supply
Vsupply = VS+ - VS-
Power delivered to a purely resistive load is:
Pload = ((VLOAD)RMS2)/Rloadeff
The effective load resistor (Rloadeff) will need to include
the effect of the feedback network. For instance,
Rloadeff in Figure 3 would be calculated as:
RL || (Rf + Rg)
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
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however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
Here, PD can be found from
PD = PQuiescent + PDynamic - PLoad
Quiescent power can be derived from the specified IS
values along with known supply voltage, VSupply. Load
power can be calculated as above with the desired signal
amplitudes using:
(VLOAD)RMS = VPEAK / √2
( ILOAD)RMS = ( VLOAD)RMS / Rloadeff
The dynamic power is focused primarily within the output
stage driving the load. This value can be calculated as:
PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS
Assuming the load is referenced in the middle of the
power rails or Vsupply/2.
The CLC1008 is short circuit protected. However, this may
not guarantee that the maximum junction temperature
(+150°C) is not exceeded under all conditions. Figure 6
shows the maximum safe power dissipation in the package
vs. the ambient temperature for the packages available.
2
SOIC-8
1.5
MSOP-8
1
0.5
SOT23-6
SOT23-5
0
-40
-20
0
20
40
60
80
Ambient Temperature (°C)
Figure 6. Maximum Power Derating
Driving Capacitive Loads
Increased phase delay at the output due to capacitive
loading can cause ringing, peaking in the frequency
response, and possible unstable behavior. Use a series
resistance, RS, between the amplifier and the load to
help improve stability and settling performance. Refer to
Figure 7.
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