CMX850L8 データシートの表示（PDF） - CML Microsystems Plc

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CMX850L8

Communications Controller

CML Microsystems Plc 

Communications Controller

Section

CONTENTS

Page

1.0 Features and Applications ..................................................................1

1.1 Brief Description..................................................................................1

1.2 Block Diagram .....................................................................................5

1.3 Signal List ............................................................................................6

1.4 External Components........................................................................ 10

1.4.1 Ring Detector Interface ......................................................... 12

1.4.2 Hook Detector Interface ........................................................ 13

1.4.3 RESETN pin........................................................................... 13

1.4.4 Local BOOT ROM.................................................................. 14

1.4.5 Line Interface......................................................................... 14

1.5 Microcontroller Core ......................................................................... 17

1.5.1 Special Function Register Memory Map .............................. 18

1.5.2 Dual Data Pointer .................................................................. 18

1.5.2.1

DPTR Registers (DPL/DPH DPL1/DPH1) ...... 18

1.5.2.2

Data Pointer Select Register (DPS) .............. 19

1.5.3 I/O Ports................................................................................. 20

1.5.3.1

Port Data Registers (P0-P5) .......................... 21

1.5.3.2

Port Direction Registers (P0DIR-P5DIR) ...... 21

1.5.3.3

Port Open-Drain Registers (P1OD-P5OD) .... 21

1.5.3.4

Port Res Pull-up Registers (P1RES-P5RES) 22

1.5.4 Memory Interface................................................................... 23

1.5.4.1

Memory Control Register (MEMCON) .......... 23

1.5.5 Interrupts ............................................................................... 25

1.5.5.1

Interrupt Enable Registers (IE, IE_1)............ 26

1.5.5.2

Interrupt Priority Registers (IP, IP_1) ........... 26

1.5.5.3

Interrupt Control Registers (ICON1A/B)....... 27

1.5.6 Oscillator and Power Management ...................................... 28

1.5.6.1

Oscillator Control Register (OSCCON) ........ 30

1.5.6.2

Speed Control Register (SPDCON) .............. 32

1.5.6.3

Speed Control Exit Register (SPXMASK)..... 33

1.5.6.4

Power Down Exit Register (PDXMASK) ....... 33

1.5.6.5

Power Control Register (PCON) ................... 34

1.5.7 Pulse Width Modulators ....................................................... 34

1.5.7.1

PWM Control Register (PWMCON)............... 35

1.5.7.2

PWM Data Registers (PWM1, PWM2) ........... 35

1.5.8 Analog to Digital Converter .................................................. 36

1.5.8.1

ADC Control Registers (ADCCON1/2) .......... 36

1.5.8.2

ADC Buffer Registers (ADCBUFL/H) ............ 40

1.5.8.3

ADC Threshold Registers (ADCTHRL/H) ..... 41

1.5.9 C-BUS Controller................................................................... 41

1.5.9.1

C-BUS Control Register (CBUSCON) ........... 42

1.5.9.2

C-BUS Buffer Register (CBUSBUF).............. 43

1.5.10 Keyboard Encoder ................................................................ 44

1.5.10.1

Keyboard Control Register (KBCON)........... 44

1.5.10.2

Keyboard Status Register (KBSTAT) ........... 45

1.5.10.3

Keyboard Buffer Register (KBBUF).............. 46

© 2003 CML Microsystems Plc

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CMX850

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