CS5451A-ISZ(2005) データシートの表示（PDF） - Cirrus Logic
部品番号
コンポーネント説明
メーカー
CS5451A-ISZ Datasheet PDF : 13 Pages
| |||
CS5451A
1. PIN DESCRIPTION
Serial Clock Output
SCLK 1
Serial Data Output
SDO 2
Frame Sync
FSO 3
Serial Port Enable
SE 4
Current Input Gain
GAIN 5
Analog Ground AGND 6
Reference Input VREFIN 7
Reference Output VREFOUT 8
Positive Analog Supply
VA+ 9
Negative Analog Supply
VA - 10
Differential Voltage Input 3 VIN3+ 11
Differential Voltage Input 3
VIN3- 12
Differential Current Input 3
IIN3+ 13
Differential Current Input 3
IIN3- 14
28 VD+ Digital Supply
27 DGND Digital Ground
26 CPD Charge Pump Drive
25 XIN Master Clock
24 RESET Reset
23 OWRS Output Word Rate Select
22 VIN1+ Differential Voltage Input 1
21 VIN1- Differential Voltage Input 1
20 IIN1+ Differential Current Input 1
19 IIN1- Differential Current Input 1
18 VIN2+ Differential Voltage Input 2
17 VIN2- Differential Voltage Input 2
16 IIN2+ Differential Current Input 2
15 IIN2- Differential Current Input 2
Clock Generator
Master Clock Input
25 XIN - External clock signal or oscillator input.
Control Pins and Serial Data I/O
Serial Clock Output
1
SCLK - Serial port clock signal that determines the output data rate for SDO pin. Rate of SCLK is
dependent on the XIN frequency and state of OWRS pin.
Serial Data Output
2 SDO -Serial port data output pin. Data will be output at a rate defined by SCLK.
Frame Sync
3 FSO - Framing signal indicates when data samples are about to be transmitted on the SDO pin.
Serial Port Enable
4 SE - When SE is low, the output pins of the serial port are tri-stated.
Current Input Gain
5
GAIN - A logic high sets current channel gain to 1, a logic low sets the gain to 20. If no connection
is made to this pin, it will default to logic low level (through internal 200 kΩ resistor to DGND).
Output Word Rate Select
OWRS - A logic low sets the output word rate (OWR) to XIN/2048 (Hz). A logic high sets the
23 OWR to XIN/1024 (Hz). If no connection is made to this pin, then OWRS will default to logic low
level (through internal 200 kΩ resistor to DGND).
Reset
24 RESET - Low activates Reset, all internal registers are set to their default states.
Analog Inputs/Outputs
Voltage Reference Input
7 VREFIN - The input to this pin establishes the voltage reference for the on-chip modulator.
Voltage Reference Output
8
VREFOUT - The on-chip voltage reference output. The voltage reference has a nominal magni-
tude of 1.2 V and is referenced to the AGND pin on the converter.
Differential Voltage Inputs
11,12 VIN3+, VIN3- - Differential analog input pins for the voltage channel 3.
18,17 VIN2+, VIN2- - Differential analog input pins for the voltage channel 2.
22,21 VIN1+, VIN1- - Differential analog input pins for the voltage channel 1.
Differential Current Inputs
13,14 IIN3+, IIN3- - Differential analog input pins for the current channel 3.
16,15 IIN2+, IIN2- - Differential analog input pins for the current channel 2.
20,19 IIN1+, IIN1- - Differential analog input pins for the current channel 1.
Power Supply Connections
Analog Ground
6 AGND - Analog ground.
Positive Analog Supply
9 VA+ - The positive analog supply. Typical +3 V ±10% relative to AGND.
Negative Analog Supply
10 VA- - The negative analog supply. Typical -2 V ±10% relative to AGND.
Charge Pump Drive
26
CPD - Designed to drive external charge pump circuitry that will produce a negative analog sup-
ply (VA-)voltage.
Digital Ground
27 DGND - Digital Ground.
Positive Digital Supply
28 VD+ - The positive digital supply. Typical +3 V ±10% relative to AGND.
DS635F2
3
Share Link: 