CS61581-IL データシートの表示（PDF） - Cirrus Logic

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CS61581-IL

T1/E1 Universal Line Interface

Cirrus Logic 

CS61581

LIST OF FIGURES

Figure 1. Signal Rise and Fall Characteristics ............................................................................... 8

Figure 2. Recovered Clock and Data Switching Characteristics.................................................... 8

Figure 3. Transmit Clock and Data Switching Characteristics ....................................................... 8

Figure 4. Serial Port Write Timing Diagram ................................................................................... 9

Figure 5. Serial Port Read Timing Diagram ................................................................................... 9

Figure 6. Typical Pulse Shape at DSX-1 Cross Connect............................................................. 12

Figure 7. Mask of the Pulse at the 2048 kbps Interface............................................................... 12

Figure 8. Minimum Input Jitter Tolerance of Receiver ................................................................. 13

Figure 9. LATN Pulse Width encoding ......................................................................................... 14

Figure 10.Typical Jitter Transfer Function - T1 ............................................................................. 15

Figure 11.Typical Jitter Transfer Function - E1 ............................................................................. 15

Figure 12.Input/Output Timing (showing address 0x10) ............................................................... 17

Figure 13.Phase Definition of Arbitrary Waveforms ...................................................................... 24

Figure 14.Example of Summing of Waveforms............................................................................. 25

Figure 15.Matched Impedance Output Configuration ................................................................... 28

Figure 16.Low Impedance Output Configuration .......................................................................... 29

Figure 17.Typical System Connection .......................................................................................... 30

LIST OF TABLES

Table 1. Pulse Shape Selection and Transformer Requirements ................................................. 11

Table 2. Data Output/Clock Relationship ...................................................................................... 13

Table 3. Register Map................................................................................................................... 17

Table 4. Register 0x10 Decoding.................................................................................................. 23

Table 5. Register 0x10 Decoding.................................................................................................. 23

Table 5. Diagnostic Mode Availability ........................................................................................... 26

Table 6. Transformer Specification ............................................................................................... 26

Table 7. Recommended Transformers for the CS61581 .............................................................. 27

DS211PP8

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