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CS61583 データシートの表示(PDF) - Cirrus Logic

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CS61583
Cirrus-Logic
Cirrus Logic Cirrus-Logic
CS61583 Datasheet PDF : 44 Pages
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CS61583
CODER1, CODER2 : Coder Mode Configuration (PLCC pins 24, 45; TQFP pins 15, 34)
Setting CODER high causes the Coder Mode to be enabled. In Coder Mode, the transmit and
receive data appears in NRZ format on TDATA and RDATA, respectively. These pins also
enable the corresponding AMI pin.
CON01, CON11, CON21, : Configuration Selection
CON02, CON12, CON22 : (PLCC pins 2, 65, 63, 66, 64, 62; TQFP pins 58, 53, 51, 54, 52, 50)
These pins configure the transmitter (pulse shape, pulse width, pulse amplitude, and driver
impedance) receiver (slicing level), and coder (HDB3 vs B8ZS). The CONx1 pins control
channel 1 and the CONx2 pins control channel 2. Both channels must be configured to operate
at the same data rate on the line interface (both T1 or both E1).
LLOOP1, LLOOP2 : Local Loopback (PLCC pins 6, 5; TQFP pins 62, 61)
A local loopback is enabled when LLOOP is high. During local loopback, the TCLK,
TPOS/TNEG (or TDATA) inputs are looped back through the jitter attenuator (if enabled) to the
RCLK, RPOS/RNEG (or RDATA) outputs. The data at TPOS/TNEG continues to be
transmitted to the line interface unless overridden by a TAOS request. The inputs at RTIP and
RRING are ignored.
RESET : Reset (PLCC pin 35; TQFP pin 25)
A device reset is selected by setting the RESET pin high for a minimum of 200 ns. The reset
function initiates on the falling edge of RESET and requires less than 20 ms to complete. The
control logic is initialized and LOS is set high.
RLOOP1, RLOOP2 : Remote Loopback (PLCC pins 7, 37; TQFP pins 63, 27)
A remote loopback is selected when RLOOP is high. The data received from the line interface
at RTIP and RRING is looped back through the jitter attenuator (if enabled) and retransmitted
on TTIP and TRING. Data recovered from RTIP and RRING continues to be transmitted on
RPOS/RNEG (or RDATA). Data input on TPOS/TNEG (or TDATA) is ignored. A TAOS
request overrides the data transmitted at TTIP and TRING.
TAOS1, TAOS2 : Transmit All Ones Select (PLCC pins 4, 3; TQFP pins 60, 59)
Setting TAOS high causes continuous ones to be transmitted at the line interface on TTIP and
TRING at the frequency determined by REFCLK.
Status
AIS1, AIS2 : Alarm Indication Signal (PLCC pins 15, 54; TQFP pins 6, 43)
The AIS indication goes high when the receiver detects 99.9% ones density in a 5.3 ms period
(< 9 zeros in 8192 bits). The AIS indication returns low when the receiver detects ≥ 9 zeros in
8192 bits.
BPV1, BPV2 : Bipolar Violation (PLCC pins 12, 57; TQFP pins 3, 46)
The BPV indication goes high for one RCLK bit period when a bipolar violation is detected in
the received signal. Bipolar violations caused by B8ZS (or HDB3) zero substitutions are not
flagged by the BPV pin if the coder mode is enabled.
DS172PP5
27

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