CS61584A データシートの表示（PDF） - Cirrus Logic

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CS61584A

Dual T1/E1 Line Interface

Cirrus Logic 

DS261PP5

CS61584A

Table 13. CS61584A External Components..................................................................................... 48

Table 14. Quartz Crystal Specifications ........................................................................................... 50

Table 15. Suggested Quartz Crystals............................................................................................... 50

Table 16. Suggested Crystal Oscillators .......................................................................................... 50

Table 17. Transformer Specifications ............................................................................................... 51

Table 18. Recommended Transformers........................................................................................... 52

LIST OF FIGURES

Figure 1.

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Figure 8.

Figure 9.

Figure 10.

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Figure 12.

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Figure 14.

Figure 15.

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Figure 17.

Figure 18.

Figure 19.

Figure 20.

Figure 21.

Figure 22.

Figure 23.

Figure 24.

Figure 25.

Figure 26.

Figure 27.

Figure 28.

Figure 29.

Signal Rise And Fall Characteristics .............................................................................. 9

Recovered Clock and Data Switching Characteristics ................................................... 9

Transmit Clock and Data Switching Characteristics ...................................................... 9

Serial Port Write Timing Diagram ................................................................................. 10

Serial Port Read Timing Diagram ................................................................................ 10

Parallel Port Timing - Motorola Mode ........................................................................... 12

Parallel Port Timing - Intel Read Mode ........................................................................ 12

Parallel Port Timing - Intel Write Mode ........................................................................ 12

Parallel Port Timing - Motorola Mode to RAM .............................................................. 13

Parallel Port Timing - Intel Read Mode from RAM or ROM ......................................... 13

Parallel Port Timing - Intel Write Mode to RAM ........................................................... 13

JTAG Switching Characteristics ................................................................................... 14

Examples of CS61584A Applications ........................................................................... 15

Typical Pulse Shape at DSX-1 Cross Connect ............................................................ 17

Mask of the Pulse at the 2048 kbps Interface .............................................................. 17

Minimum Input Jitter Tolerance of Receiver (Clock Recovery Circuit and

jitter Attenuator) ............................................................................................................ 18

Typical Jitter Transfer Function .................................................................................... 19

Alarm Indication Event Relationships ........................................................................... 24

Phase Definition of Arbitrary Waveforms ..................................................................... 29

Example of Summing of Waveforms ............................................................................ 29

Serial Read/Write Format (SPOL = 0) .......................................................................... 30

Address Command byte ............................................................................................... 30

JTAG Circuitry Block Diagram ..................................................................................... 31

TAP Controller State Diagram ...................................................................................... 34

JTAG Instruction Register update ................................................................................ 37

JTAG Data Register update ......................................................................................... 38

Hardware Mode Configuration ..................................................................................... 48

Host Mode Serial Port Configuration ............................................................................ 49

Host Mode Parallel Port Configuration ......................................................................... 49

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DDS2S6216P1PF15

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