CXA3562AR データシートの表示（PDF） - Sony Semiconductor

部品番号

コンポーネント説明

メーカー

CXA3562AR

LCD Driver

Sony Semiconductor 

CXA3562AR

Pin

No.

Symbol

I/O

Standard

voltage level

56

57

SID_OUTX

SID_OUT

O

1.5 to 13.5V

Equivalent circuit

VCC

100k

0.2p

GND

100k

0.2p

145

56

57

Description

Precharge waveform output.

SID_OUTX outputs the inverse

of SID_OUT based on the

output center voltage. These

pins cannot directly drive the

LCD panel, so input to the LCD

panel with an external a buffer.

VDD

58 PRG_LV

59 SID_LV

I 1.0 to 5.0V 58

59

GND

VCC

29µ

Precharge level setting.

Adjusts the SID_OUT and

SID_OUTX output potential.

50k

PRG_LV is reflected when the

50k

PRG input pin (Pin 60) is high,

and SID_LV is reflected when

PRG is low.

60 PRG

I

High: ≥2.0V

Low: ≤0.8V

VDD

60

GND

VCC

100k

10k

50µ

VDD

70µ

10µ

68 VREF_I

I

3.2V

68

GND

VDD

1k

280µ

33.3k

2k

69 VREF_O O

3.2V

20µ

GND

69

20k

12.4k

70 F/H_CNT

High: ≥2.0V

I Low: ≤0.8V

Open: Low

VDD

70

50k

192

200k

GND

–5–

Timing pulse input for switching

the Pins 56 and 57 output levels.

(See PRG_LV (Pin 58) and

SID_LV (Pin 59).)

Internal D/A converter reference

voltage input.

Normally connect directly to

VREF_O.

Reference voltage output.

Normally connect directly to

VREF_I, and connect to GND

through a 0.5 to 1.0µF capacitor.

SH_OUT output timing selection.

High: SH_OUT1 to SH_OUT6

and SH_OUT7 to SH_OUT12

are output at different timing.

Low: SH_OUT1 to SH_OUT12

are output at the same timing.

Share Link: