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CXD2408R データシートの表示(PDF) - Sony Semiconductor

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CXD2408R Datasheet PDF : 30 Pages
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CXD2408R
In the direct reset mode, the signal output is reset to ODD or EVEN field depending on the input timing of the
vertical reset signal as shown in the figure below.
Field identification
VRI
1
2
HDO
fH
VDO
tp2
tp1
tp3
tp4
tp5
fH L: ODD H: EVEN
1
ODD
VDO
2
EVEN
Symbol
Definition
Specified value Unit
tp1
Range of resetting to ODD
21.9
µs
tp2
Range of resetting to EVEN
31.6
µs
tp3
Range of resetting to ODD
µs
tp4
Prohibited area
200
ns
tp5
Prohibited area
200
ns
In the direct reset mode, the cycle of HD can be arbitrary. Therefore, tp3 is not specified.
– 10 –

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